EE 321 Analog Electronics, Fall 2009Exam 3 November 18, 2009Rules: This is a op en book test. You may use the textbook a s well as your notes. The examwill last 50 minutes. Each problem counts equally toward your grade. None of the problemsrequire long calculations.Use the following parameters in this exam, unless otherwise stated: k′nWL= 1 mA/V2, |Vt| =1 V, and VDD= +5 V.RVDDDRR12MOSFETs at DC1. In the circuit above, select R1, R2, and RDsuch that ID= 1 mA andVD= 3 V.RD=VDD− VDID=5 − 31= 2 kΩID=k′n2WL(VGS− Vt)2VGS=sIDk′n2WL+ Vt=r10.5+ 1 = 2.41 VAnd we see that the circuit is in saturation mode as we assumed. Next choose R2=1 MΩ, andR2R1+ R2=VGSVDDR1= R2VDDVGS− 1= 1 × 10652.41− 1= 1.07 MΩ2. For the same circ uit, if we set VG= 2 V and VD= 0.1 V, what is theoperating region, and what should be RD? (Be sure to make the reasonablesimplification which makes t he math much quicker). What is the effectivedrain to source resistance?This circuit is in the triode region because VDS< VGS− Vt. First find the currentID=k′nWL(VGS− Vt) VDS−VDS2=1 ×(2 − 1) × 0.1 −0.122=0.095 mA = 95 µAThen,RD=VDD− VDID=5 − 0.195 × 10−6= 51.6 kΩEffective dra in to source resistance isRDS=VDSID=0.195 × 10−6= 1.05 kΩMOSFET amplifier3. Still for the same circuit, but now VDD= 10 V, determine the values of VGand RDto make it a common-source amplifier with a volt age gain of −10and a maximum negative output swing of 1 V before entering saturation.Hint: Because the swing in vgis much smaller than the swing in vdwe ignorethe former, and thus the bias point is simply VD= VG− Vt+ 1 V = VG.Begin with the expression for the voltage gain in terms of bias values andfind VDdirectly from it. Then find ID, and then RD. This is the longestcalculation of the exam, but still not long.Following the hint we write the voltage gain asAv= −2 (VDD− VD)VGS− VtBut since VD= VGSwe can writeAv= −2 (VDD− VD)VD− VtAvVD− AvVt= −2VDD+ 2VDVD(Av− 2) = −2VDD+ AvVtVD=−2VDD+ AvVtAv− 2=−2 × 10 − 10 × 1−12= 2.5 VBecause VGS= VDSthe MOSFET is in saturation and we haveID=k′n2WL(VGS− Vt)2=12(2.5 − 1.)2=1.13 mAFinally, the drain resistor isRD=VDD− VDID=10 − 2.51.13= 6.64 kΩAmplifier input and output resistances4. A common source amplifier is biased such that gm= 1 mA/V, RG= 1 MΩand RD= 10 kΩ. I gnore channel-length modulation. What are the inputand output resistances? What is the open-circuit voltage gain? What isthe overall gain (source to load) if the input signal source has a outputresistance of 100 kΩ and the load is RL= 5 kΩ.This problem can be solved by examining Table 4 .2 in the text book.Rin= RG= 1 MΩRout= RD= 10 kΩAvo= −gmRD= −10−3× 104= 10Gv= −RinRin+ Rsourcegm(RD||RL)= −106106+ 10510−311104+15×103= −
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