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NMT EE 321L - Lab 6 Voltage regulators, Clamping, voltage doubler

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EE 321L Analog Electronics Laboratory Fall 2010Lab 6Voltage regulators, Clamping, voltage doublerPre-Lab1. Compute the value of R in step 1.2. Compute the resistance at which regulation stop, in step 4.3. Estimate the regulation in step 5 from rzobtained from the data sheet.4. In step 7 pick the value of the other resistor.5. Draw the circuit in step 12.6. Describ e what you expect to see in step 14 and 16.7. Draw the circuit in step 17.In this lab we will look at voltage regulation using Zener diodes, then at limiting and clampingcircuits, and finally at the voltage doubler circuit.Simple Zener regulatorIn this section you will build a simple Zener regulator and characterize it.+15 VRRL1. Build the simple 8.2 V Zener regulator using a 1N5237 and a 15 V source. Adjust thevalue of R to make the current through the Zener diode approximately 20 mA.2. Without a load, measure the output voltage (with a multimeter for accuracy) andcompute the actual current.3. Attach a 1 kΩ load resistor, measure the output voltage a gain and compute the currentthrough the diode. What is the Zener resistance, rz=∆vZ∆iZ.1EE 321L Analog Electronics Laboratory Fall 20104. At what load resistance, roughly, do you expect the Zener diode current to drop tozero? What happens as you continue decreasing the load resistance from that point?5. With the 1 kΩ load resistor in place, vary the input voltage (fo r example between13 V and 17 V). What is the regulation,∆vout∆vin. Compare this regulation to a theoreticalprediction based on rz.A better Zener regulatorIn this section you will build a better Zener regulator.−++15 V50010K6. Build this Zener regulator circuit. Note that in this case the current thro ug h the Zenerdiode is independent of the current being drawn at the output. The circuit has twostable states, and to avoid it picking the negative output voltage stable state we attachthe negative supply to ground.7. Use a 10 kΩ potentiometer in the feedback path (what should be the value of the otherresistor?), and pick a 10 V o utput.8. Can you measure the regulation now? What is the lower input limit of regulation?Limiter circuitsIn this circuit you will characterize two different limiter circuits.9. Build this circuit.10KViV o2EE 321L Analog Electronics Laboratory Fall 201010. Apply an input 1 V amplitude sine wave, plot the input and the output. Explain theresult.11. In XY mode plot the transfer function between input and output. Explain the result.12. Now replace the two parallel diodes with two 4.3 V Zener diodes in series, with oppositepolarity and repeat the two previous steps. Explain the result.Clamping circuitIn this section you will look at the clamped capacitor circuit.13. Build t his clamped capacitor circuit.ViV o+ −+−3.3 uF14. Apply a sine wave of 2 V amplitude. Plot the input and output.15. Explain the relationship between the input and the output.16. Add a positive offset to the input. Plot and explain the result.Voltage doubler circuit17. Expand the clamped capacitor circuit to construct the voltage doubler described inthe text book. Use a second 3.3 µF capacitor. What should be its polarity?18. Plot the input and output together and explain t he


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NMT EE 321L - Lab 6 Voltage regulators, Clamping, voltage doubler

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