Loran-C ReceiverGroup MembersBackground: What is Loran-C?Loran-C SignalLoran-C Signal continuedProject PurposeProject FundingTentative BudgetProject ObjectivesOutline of ApproachSubsystems DiagramAntenna Receiver SubsystemAnalog-to-Digital Converter SubsystemFPGA SubsystemProcessor SubsystemRAM SubsystemSerial Interface SubsystemPC SubsystemPowerTasksScheduleDivision of LaborRisks and BackupAbove and BeyondQuestions and CommentsLoran-C ReceiverTeam DeathstarSeptember 7, 2004Capstone Fall 2004Group MembersMatt Anderson (ECE)Chris Birschbach (ECE)Christy Corner (EE)Matt Hayman (EE)Erin Mowbray (ECE)Background: What is Loran-C?Loran-C is a navigation system that was developed by the US Coast Guard. The system is comprised of transmission stations located around the world.The Loran-C signal is transmitted from these stations at specified intervals. By measuring the time delay between transmissions a user can determine their position relative to the towers.Loran-C SignalLoran-C Signal continuedThe Loran-C signal is transmitted on a 100kHz carrier.Project PurposeOur group will design a receiver that will be able to capture and decode the Loran-C signal maintained by the United States Coast Guard. Our system will consist of three main parts: the antenna/receiver, processing unit and personal computer.Project FundingUndergraduate Research Opportunities Program (UROP) Grant.Amount: $1750Tentative BudgetItem Description Estimated PriceProcessor MC68HC912B32 assembled $100.00LCD Display $75.00Additional memory $50.00A to D converter $50.00Antenna Assembly $100.00Receiver Enclosure $100.00Printed Circuit Board $200.00FPGA Xilinx FPGA Evaluation Kit $250.00Filters 3 Butterworth (8th order) $75.00RS-232 Interface $25.00Support Electronics Resistors, Caps, switches, sockets, cables $150.00Power Supply $100.00Student Designed User Manual Weighted Paper, Binding, Printing Costs $150.00Final Project Display Printed Poster for Engineering Expo $100.00Loran C User Handbook $25.00Misc. (Ink Cartridges, Repair parts, Unforeseen Parts needed, additional reference manuals) $200.00 TOTAL: $1,750.00Project ObjectivesCapture a clean copy of the Loran-C signalDetermine Time DelaysConvert to a Latitudinal & Longitudinal coordinates.Outline of ApproachThe system will consist of the following subsystems:Antenna ReceiverAnalog-to-digital converter Motorola 68K processorMemoryFPGASerial Interface PCPowerSubsystems DiagramAntenna/ReceiverFPGA PCRAMA/D ConverterProcessing UnitProcessorAntenna Receiver SubsystemThe antenna/receiver will consist of a loop antenna with a active Butterworth filter to capture and amplify the fundamental signal received by the antenna. This segment of the project serves the main purpose of capturing the Loran-C signal with minimal noise and preparing it for processing.Analog-to-Digital Converter SubsystemThe A/D converter will sample the analog signal.Sampling rate will be 1MHz. The digital data will be sent to the FPGA .FPGA SubsystemThe FPGA has a state machine for detecting the third zero crossing of the Loran-C signal. (Generates an interrupt)It functions as a counter to measure the delay between pulses. It includes an interrupt controller for the processor.Processor SubsystemUpon generation of an interrupt, the processor stores the counter data from the FPGA into RAM. Performs operations on the counter data to determine time delays and stores the delays in RAM.The microcontroller sends the time delay data to the serial interface with the PC.RAM SubsystemHolds the time delay and counter data for processing and transmission.Serial Interface SubsystemThe communication interface between the PC and the processor.Consists of a serial shift register & RS-232 logic level converter.PC SubsystemDisplays the time delays.Performs intensive conversion calculations to convert data into Latitudinal and Longitudinal coordinates. Displays the Latitudinal and Longitudinal coordinates.PowerTransform, rectify, and regulate voltage from standard 120V/60Hz outlet to required DC voltages. (Or purchase power supply)Include portable power sources (battery or car adapter) if time permitsTasks Antenna DesignFilteringPCB designMemory interfaceFPGA designPC programmingPC interfaceA/D interfaceProcessor programmingPowerUsers ManualScheduleDivision of LaborMatt APowerMemory interfaceMicroprocessor ProgrammingChris BPC programmingMicroprocessor programmingUser’s ManualChristy CAntenna/FilteringVerilog DesignUser’s ManualMatt HAntenna/FilteringPCB Microprocessor ProgrammingPC programmingErin MVerilog DesignUser’s ManualPC interfaceRisks and BackupReceiving a clean copy of the signal(Can generate a fake signal)Baud rate generation for PC/processor communicationBuffer overflow (Sample slower)Size and complexity of the state machine.(Can shift tasks from the FPGA to the processor to compensate.)RS-232 Communication on PC(Manually entering data into the conversion program)Above and BeyondIf time permits we shall include a LCD display on our receiver that displays the Loran-C time delays. Portable power sources.Cup HoldersQuestions and
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