TnTech ECE 3110 - Combinational Logic Design Practices

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ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design PracticesThree State Buffers/DriversThree-state buffersSlide 4Timing considerationsStandard SSI/MSI 3-state buffersOctal non-inverting 3-state bufferDriver applicationThree-state transceiverTransceiver applicationMultiplexers (mux)MSI: 74x151 8-input 1-bit multiplexer74x151 truth tableOther multiplexer varietiesExpanding MultiplexersDemultiplexersHomework #8Next…ECE 3110: Introduction to Digital SystemsChapter 6 Combinational Logic Design PracticesThree-state devicesMultiplexersThree State Buffers/DriversA buffer/inverter with enable input Buffer Buffer Inverter Inverter Active High Enable Active Low Enable Active High Enable Active Low Enable The device behaves like an ordinary buffer/inverter when the enable input is asserted. The output is floating ( High Impedance, Hi-Z ) when the enable input is deasserted ( The input is isolated from the output, behaves as if it did not exist)Application: Controlling the access of a single line/bus by multiple devicesThree-state buffersOutput = LOW, HIGH, or Hi-Z.Can tie multiple outputs together, if at most one at a time is driven.8 sources share a three-state party lineTiming considerationsStandard SSI/MSI 3-state buffersSSI: 74x125, 74x126 (independent enable inputs)MSI: 74x541 and varieties such as 74x540, 74x240, 74x241Octal non-inverting 3-state bufferHysteresisDriver applicationPairs of 3-state buffers connected in opposite directions between each pair of pins, so data can be transferred in either direction.DIR determines the direction of transfer (A-->B or B-->A)Three-state transceiverTransceiver applicationBidirectional busesMultiplexers (mux)Select one of n sources of data to transmit on a bus.E.g. Put between Processor’s registers and ALUA 16-bit processor where 3-bit field specifies one of 8 registers.The 3-bit field is connected to the select inputs of an 8-input, 16-bit mux.MSI: 74x1518-input 1-bit multiplexer74x151 truth tableOther multiplexer varieties2-input, 4-bit-wide74x1574-input, 2-bit-wide74x153Expanding Multiplexers32-to-1 muxDemultiplexersA mux is used to select one of n sources of data to transmit on a bus. A demultiplexer can be used to route the bus data to one of m destinations. Just the inverse of a mux.A binary decoder with an enable input can be used as a demux. E.g. 74x139 can be used as a 2-bit, 4-output demux.Homework #8Notes: On all timing calculation problems, describe the circuit path used and show each number in the calculation. For problem 5.19, use real 74x parts ONLY and include specific 74x part numbers for all components used on the diagram.Next…X-OR gates and Parity circuitsComparatorsReading Wakerly


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