CSE111 Fall 2008 H Kershner Interpreting Logic Gates Logic gates are the mechanism used to convert Boolean logic into the circuitry the computer needs to solve such problems We have learned about three 3 different gates The AND Gate takes two or more inputs Remember that the AND operator examines all the inputs If they are all True 1 the result is True 1 If any of the inputs are False 0 the Result is False 0 The equation for this AND gate is The Truth Table for this AND gate is R ABC A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C ABC 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 The OR Gate takes two or more inputs Remember that the OR operator examines all the inputs If any of the inputs are True 1 the Result is True 1 The equation for this OR gate is R A B C The Truth Table for this OR gate is A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C A B C 0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 The last gate we have discussed is the NOT gate and this gate simply inverts whatever data enters it If the input is True 1 the output is False 0 If the input is False 0 the output is True 1 Copyright 2008 by Helene G Kershner CSE111 Fall 2008 H Kershner Interpreting Logic Gates The equation for this NOT gate is The Truth Table for this NOT gate is R A A 0 1 A 1 0 These are the building blocks of computer circuitry By combining them in the correct order all of the fancier circuitry is build Logic Networks Gates are interconnected together to form circuits that perform more complex functions care called Logic Networks o Wires connect gates o When two wires cross a dot represents a connection Connection dot NO Connection This network represents the following Boolean statement R AB A B How do I know this Examining the diagram we can assume that if the inputs are on the left and the output on the right then the current in this circuit moves from left to right What do we encounter first A AND B enters at the top AB B OR A enters at the bottom B A So thus far R AB B A The outputs from both of these gates goes into an OR gate Copyright 2008 by Helene G Kershner CSE111 Fall 2008 H Kershner Interpreting Logic Gates So AB B A R AB B A OR The Truth Table is A B 0 0 0 1 1 0 1 1 AB 0 0 0 1 A B 0 1 1 1 AB A B 0 1 1 1 Using the Truth Table above If A 1 B 0 What is R We can read across the third line of the table and see that R 1 There is another way to find this value In the diagram below the values are placed on the gate diagram The input to the gate is identified then the output is identified and we can determine R without using a truth table The output from the final OR gate R 1 Example 1 What is logic equation represented by this circuit There are three gates used in this example B and C are input to the top OR gate D enters a NOT gate The output from the OR gate and the NOT gate become the input to the final AND gate When data is input to the gates on the left what do we know B C go into the OR gate B C D goes into the NOT gate D Copyright 2008 by Helene G Kershner CSE111 Fall 2008 H Kershner Interpreting Logic Gates B C D AND R B C D The Truth Table is B 0 0 0 0 1 1 1 1 R B C D If B 1 C 1 D 1 What is R Reading across the last line we can see that R 0 C 0 0 1 1 0 0 1 1 D B C D B C D 0 0 1 0 1 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 0 0 Another way to solve this problem is by placing values directly on the circuit diagram The output from each gate is then determined by the input into it B 1 1 C 1 R 0 0 D 1 Example 2 This is an expansion of the above circuit What equation does the following circuit represent Construct the truth table for the following circuit If A 1 B 1 C 0 and D 0 what is R If A 0 B 0 C 1 and D 1 what is R Look carefully at the component parts of this diagram The topmost NOT gate takes A as input Its out put is A Below that is an OR gate which takes both B and C as input Its output is contained in the expression B C At the bottom in another NOT gate which can be represented at D Copyright 2008 by Helene G Kershner CSE111 Fall 2008 H Kershner Interpreting Logic Gates So far we have A B C D The output of the OR gate and the NOT gate are input to an AND gate The output of this AND gate is input to the final OR gate whose other input is the topmost NOT gate A B C D AND OR So R A B C D or R A B C D Truth Table for R A B C D A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 A 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 B C 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 D 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 B C D 0 0 1 0 1 0 1 0 0 0 1 0 1 0 1 0 A B C D 1 1 1 1 1 1 1 1 0 0 1 0 1 0 1 0 If A 1 B 1 C 0 and D 0 what is R Using the Truth Table R 1 If A 0 B 0 C 1 and D 1 what is R Using the Truth Table R 1 As with the previous example we can …
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