TOC Switching Forwarding Why Switching Techniques Switch Characteristics Switch Examples Switch Architectures Summary TOC Switching Why Direct vs Switched Networks n links Single link Switches Direct Network Limitations Distance coordination delay propagation limitation Number of hosts collisions shared bandwidth address tables Single link technology cannot mix optical wireless Internetworking Externality gain at low cost TOC Switching Why Techniques Circuit Switching e g Telephone net Packet Switching Datagram e g IP Ethernet Virtual Circuits e g MPLS ATM Source Routing Comparison TOC Switching Techniques Circuit Switching Mechanism Features TOC Switching Techniques Circuit Packet Switching Mechanism Features TOC Switching Techniques Packet PS Datagram General idea no connection establishment but each packet contains enough info to specify destination Switches contain forwarding tables but no perconnection state Forwarding tables contain info on which outgoing port to use for each destination Two types of addressing Layer 2 or Layer 3 TOC Switching Techniques Packet Datagram Layer 2 e g Ethernet Flat address space no structure Forwarding table Exact match of destination L2 address TOC Switching Techniques Packet Datagram L2 Layer 3 e g IP L3 network e g IP Topological structure match prefix Either fixed prefix length or longest match 13 23 2 0 1 3 TOC Switching Techniques Packet Datagram L3 Layer 3 e g IP 1 2 13 13 4 14 13 23 2 0 1 3 TOC Switching Techniques Packet Datagram L3 Layer 3 e g IP 5 1 2 6 4 13 23 2 0 1 3 TOC Switching Techniques Packet Datagram L3 Layer 3 e g IP 13 23 2 4 13 23 2 0 3 TOC Switching Techniques Packet Datagram L3 1 PS Virtual Circuit Connection setup establishes a path through switches A virtual circuit ID VCI identifies path Uses packet switching with packets containing VCI VCIs are often indices into per switch connection tables change at each hop 7 7 7 7 7 8 7 0 7 TOC Switching Techniques Packet VC 7 7 7 7 9 Source Routing source 4 3 4 1 2 3 4 1 2 3 4 1 2 3 4 4 3 4 TOC Switching Techniques Source Routing 1 2 3 4 1 2 3 4 1 2 3 4 4 3 4 Comparison Datagram Virtual circuit switching Circuit switching Forwarding cost high low none Bandwidth utilization Resource reservations Robustness high flexible low none flexible yes high low low 7 9 TOC Switching Techniques Comparison Characteristics Ports Fast Ethernet OC 3 ATM Protocols ST Link Agg VLAN OSPF RIP BGP VPN Load Balancing WRED WFQ Performance Throughput Reliability Power TOC Switching Characteristics Examples Juniper M160 Cisco GSR Cisco 7600 Cisco catalyst 6500 Extreme Summit Foundry ServerIron TOC Switching Examples Cisco GSR 12416 WAN Router Large throughput SONET links Up to 16 line cards at 10 Gbps each 19 Crossbar Fabric Line Cards 1 port OC 192c 4 port OC48c Many others ATM Ethernet 6ft 2ft TOC Switching Examples GSR Juniper M160 WAN Router Large throughput SONET links Crossbar Fabric Line Cards 1 port OC 192c 19 4 port OC48c Many others Capacity ATM Ethernet 80Gb s Power 2 6kW 3ft 2 5ft TOC Switching Examples M160 Cisco 7600 MAN WAN Router Up to 128 Gbps with Crossbar Fabric 10Mbps 10Gbps LAN Interfaces OC 3 to OC 48 SONET Interfaces MPLS WFQ LLQ WRED Traffic Shaping TOC Switching Examples 7600 Cisco cat 6500 From LAN to Access 48 to 576 10 100 Ethernet Interfaces 10 GE OC 3 OC 12 OC 48 ATM QoS ACL Load Balancing VPN Up to 128Gbps with crossbar L4 7 Switching VLAN IP Telephony E1 T1 inline power Ethernet SNMP RMON TOC Switching Examples Cat6k Extreme Summit 48 10 100 ports 2 GE SX LX or LX 70 17 5Gbps non blocking 10 1 Mpps Wire speed L2 Wire speed L3 static or RIP OSPF DVRMP PIM TOC Switching Examples Summit Foundry ServerIron Server Load Balancing Transparent Cache Switching Firewall Load Balancing Global Server Load Balancing Extended Layer 4 7 functionality including URL Cookie and SSL Session ID based switching Secure Network Address Translation NAT and Port address translation PAT TOC Switching Examples ServerIron Architectures Generic Architecture First Generation Second Generation Third Generation Input Functions Output Functions Interconnection Designs OUT IN VOB Combined IN OUT TOC Switching Architectures Generic Input and output interfaces are connected through an interconnect A interconnect can be implemented by Shared memory low capacity routers e g PC based routers Shared bus Medium capacity routers Point to point switched bus High capacity routers TOC Switching Architectures Generic input interface output interface Interconnect First Generation Shared Backplane CP I Line U nte rfa ce M em or y CPU TOC Switching Architectures First Buffer Memory Line Interface Line Interface Line Interface MAC MAC MAC Typically 0 5Gbps aggregate capacity Limited by rate of shared memory Slide by Nick McKeown Route Table Second Generation CPU Typically 5Gb s aggregate capacity Limited by shared bus Buffer Memory Route Table Line Card Line Card Line Card Buffer Memory Buffer Memory Buffer Memory Fwding Cache Fwding Cache Fwding Cache MAC MAC MAC Slide by Nick McKeown TOC Switching Architectures Second Third Generation Switched Backplane Li CPIn ne Uter fa ce M em or y Typically 50Gbps aggregate capacity TOC Switching Architectures Third Line Card CPU Card Line Card Local Buffer Memory Routing Table Local Buffer Memory Fwding Table Fwding Table MAC MAC Slide by Nick McKeown Input Functions Packet forwarding decide to which output interface to forward each packet based on the information in packet header examine packet header lookup in forwarding table update packet header TOC Switching Architectures Input Functions Output Functions Buffer management decide when and which packet to drop Scheduler decide when and which packet to transmit Buffer 1 2 TOC Switching Architectures Output Functions Scheduler Output Functions ct Packet classification map each packet to a predefined flow connection for datagram forwarding use to implement more sophisticated services e g QoS Flow a subset of packets between any two endpoints in the network flow 1 1 2 Classifier flow 2 flow n Buffer management TOC Switching Architectures Output Functions Scheduler Output Queued Only output interfaces store packets Advantage Easy to design algorithms only one congestion point input interface output interface Disadvantage Requires an output speedup Ro C N where N is the number of interfaces not feasible for large N Backplane RO TOC Switching Architectures Output Queued C Input Queues Only input interfaces store packets Advantages
View Full Document
Unlocking...