UCD EEC 180A - LAB 5: COMBINATIONAL NETWORK DESIGN USING MSI AND PAL DEVICES

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UNIVERSITY OF CALIFORNIA, DAVISDepartment of Electrical and Computer EngineeringEEC180A DIGITAL SYSTEMS ILAB 5: COMBINATIONAL NETWORK DESIGN USING MSI AND PALDEVICESThe purpose of this lab is to learn how to design and implement a combinational logic networkusing MSI chips and to introduce Programmable Logic Devices.Hardware Required:New parts:1 pc. 74LS83 4-Bit Full Adder2 pcs. 74LS153 Dual 4-to-1 Multiplexers1 pc. PALCE22V10 Programmable Logic DeviceParts from previous labs:2 pc. 74LS00 Quad 2-input NAND gate1 pc. 74LS04 Hex Inverter1 pc. 74LS10 Triple 3-input NAND gate1 pc. 7730 7-Segment DisplayPreparation (Pre-lab)Do the complete paper design for Part I. Show the K-maps for the output signals and thehardware implementation using muxes and gates. For each of the four functions to beimplemented using a multiplexer, you should show two different designs as specifiedbelow.Part I: Using 4-Bit Adder, Muxes and Gatesa) For this part, the 7483 4-bit adder will be used to add two 2-bit numbers and a 1-bitnumber to produce a 3-bit output as shown in Figure 1. (You will need to use the carry-in bit, C0.) Design a combinational logic network which accepts the 3-bit output fromthe adder and drives a 7-segment display such that the result is displayed in decimal (0-7).You will need to design logic functions to drive each of the 7-segment display drivers, a-g. Design and implement four of these functions by using four 4-to-1 multiplexers andthe other three by using logic gates.For each function implemented using a multiplexer, show at least two designs for thefunction with different sets of variables used on the selection inputs! Your TA willdecide which design you will implement in the lab. Be sure to have your TA verify yourworking circuit.Also remember to connect a 330 to 500 ohms of resistor to each segment input of the 7-Segment Display.74LS83A[1..0]B[1..0]C0SUM[2..0] MUX andCombinational Network7-Segment Display (7730)7Figure 1: Part I Block DiagramPart II: Using Programmable Array Logic Devicea) In this part of the lab, you will implement your 2-bit adder using a Programmable ArrayLogic (PAL) device. The entire combinational network designed in Part I can fit onto asingle PAL chip, as shown in Figure 2. (Note that in this part you do not need to includethe carry-in bit,C0, although you can include it if you choose. Since 5-variableKarnaugh maps are difficult to work with, we have reduced the number of input variablesto 4.)The PALCE22V10 device has 10 pins which can be configured as outputs and 22 pinswhich can be used for inputs. (See datasheet on Web.) These chips are reprogrammableso they can be erased and used again. To implement a design using a PAL, we usePALASM software along with a PAL programmer device to actually program the chip.Your TA will help you in programming the PAL but you must understand theprocedures he/she follows in the process.Develop a set of equations for the 7-segment display inputs in terms of the two 2-bit inputnumbers, i.e., A1, A0, B1, and B0.Your logic equations should be in sum of products form. There are from 8 to 16product terms available to each of the 10 outputs for the 22V10, with a total of 120products maximum. Use “*” for product terms, “+” for summation and “/” forcomplements. For example, an equation with valid syntax would beA = A1*/B0 + /A1*/B1*B0Note that “*” takes precedence over “+” in these equations. The PALASM software willcheck for syntax error during the compilation process. Of course, it can't detect logicerrors in your equations.7-Segment Display (7730)7PALCE22V10A[1..0]B[1..0]Figure 2: Part II Block DiagramUsing PALASM to enter your design:1. From a DOS window, create a working directory for yourself under c:\usr.i.e. C:\> cd usrC:\USR> md yournameC:\USR> cd yourname2. Run the PALASM program from your DOS window.i.e. C:\USR\YOURNAME>palasmAfter you press any key, the program will display the main menu page with the FILEselection opened.3. Highlight Change directory and press enter. Type in the name of your working directoryat the prompt.4. Highlight New design file using cursor keys and press enter. A window will appear foryou to enter your file name. The extension must be .pds, i.e., test.pdsFigure 3 shows a typical format for the input file which will be created in the next steps. Theequations will be entered through a PALASM screen editor, as explained below.5. Next a template page will appear. Enter in the header information such as Title, Pattern,Revision, Author, Company, and Date. These are optional fields so don't worry about yourentries. You must enter a Chip Name. This can be any string to identify your design (i.e.,Mealy, Template, etc.). Next highlight the correct device type. For this lab, you will usePAL22V10. Make sure this choice is specified correctly.6. To complete the template, you need to identify the pin connections for your chip. Follow theexample shown in Figure 3. When you are done specifying the pin connections, press F10to save the template data. The program will automatically enter the editor so that you can typein your equations.7. Within the editor, change the Part type specified earlier from PAL22V10 to PALCE22V10.Although this choice is not in the Parts menu, the "CE" designation is needed for some of thenewer parts.8. Use the arrow keys to move the cursor to the EQUATIONS section. Type in the equationsfor your design. When you are done, press F10. You are now ready to compile yourprogram. You can also enter simulation vectors, as shown in Figure 3, in order to verifyyour design.9. Use the arrow keys to move to the RUN menu. Highlight compile and press return. Yourprogram will take several minutes to compile. If you entered simulation vectors, you canhighlight Both in order to compile and simulate your design.10. Assuming that your program compiled without errors, you are now ready to check thesimulation. Use the arrows to open the VIEW menu and highlight Simulation trace toview the simulation results. Once you have verified your design, you are ready to transferthe result file, with a (.jed or .jdc) extension, to the PAL programmer. Exit the palasmprogram by pressing Escape and answering Y to the question.11. Setting up the PAL programmer:The TA will help you with this part.Be sure to verify that the checksum at the end of your output file is the one calculated by thePAL programmer software. You can also


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UCD EEC 180A - LAB 5: COMBINATIONAL NETWORK DESIGN USING MSI AND PAL DEVICES

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