12-D Cross Section of an MIS CapacitorMetalSemiconductordInsulatorOhmic ContactVGroundd and tox are used interchangeably.Note: Not drawn to scale.d can be 40Ǻ, while the thickness of the substratecan be 100μm.2Device Physics ReviewSiO2Poly SiliconNa=1016cm-3VG<0VB=0ECEVEFPEFMqVGAccumulation3MOS System Under External BiasSiO2Poly SiliconNa=1016cm-3VG<0VB=0ECEVEFPEFMqVGAccumulation4MOS System Under External BiasDepletionSiO2Poly SiliconNa=1016cm-3VG>0smallVB=0ECEVEFPEFMqVGDepletion Region5MOS System Under External BiasThresholdSiO2Poly SiliconNa=1016cm-3VG=VTVB=0ECEVEFPEFMqVGDepletion Region6Detailed EGB for MISqΨs(>0)qΨp(x)qΨBpEgEcEvEiEF7Basic Charge Model 1Hole Concentration Electron Concentration Net Doping ConcentrationP-TypeTotal Charge Concentration8Basic Charge Model 2Far from the surface ρ=0Near the surface: 3-D Poisson’s EquationAssume no variation in the y or x directions9Basic Charge Model 3N-Channel Device the quasi-Fermi level of holes can be assumed to be constant (Ψ≥0)Intrinsic carrier concentration Thermal VoltagekT/qFermi Potential10Basic Charge Model 4Application of VS or VD brings electrons out ofEquilibrium, denoted by the quasi-Fermi potential ΦFnΦFn=ΦF+VChannel Voltage11Basic Charge Model 5The doping concentration Nb is assumed constant in the channel., VS, VD, Eox affects vanishV=Ψ=0ΦF>>UT12Basic Charge Model 6Electrons Holes Fixed depletion charge13Basic Charge Model 714Basic Charge Model 815Basic Charge Model 9FAccumulationWeak inv.Strong InversionAccumulationWeak inv.F16Notice that as the channel voltage increases, it takes more surface potential to research strong inversion, and accumulation and depletion are not affected.1.00E-021.00E-011.00E+001.00E+011.00E+021.00E+031.00E+04-20-10 0 1020304050607080Ψ/UTFV=0V=.5V=117Apply Guass’s LawQsiEx+Δx=Ex-EzsEy=0ExEz=0Ψs<0 Accumulation of HolesΨs=0, F=0, Flatband0<Ψs<<2ΦF+V Weak inversion (There is a small concentration ofelectrons.)Ψs>2ΦF+V Strong Inversion18We need to relate the Gate Voltage (VG) to the Surface Potential (Ψ)The Electric Field at the upper face:Fixed oxide ChargeMetal Semiconductor WorkfunctionSurface potential19Effects of Real Surfaces• Work Function Difference:– Doping level changes (φms= φm- φs)– Always negative– To take into account band bends down (can even cause a channel to exist).• Interface Charge:–Qm(Mobile ionic), Qot(Oxide trapped), Qf(Oxide fixed), Qit(Interface trap)20Work Function DifferenceVariation of the metal-semiconductor work function -1.2-1-0.8-0.6-0.4-0.201.0E+12 1.0E+13 1.0E+14 1.0E+15 1.0E+16 1.0E+17 1.0E+18Nd, Na (cm-3)φms(V)Al-p SiAl-n Si21Effects of Real SurfacesmqΦsqΦFmEFsEFsEqVFmEvEiEcEε (a) Equilibrium(b) Flat bandV=0msFBVVΦ==22Effects of Real SurfacesitQfQotQmQ+Na++-MetalSiO2SiOxSimQotQfQitQMobile inoic chargeOxide trapped chargeOxide fixed chargeInterface trap charge++++++iQ+MSOcEiEFsEvEqVFmEiiFBCQVV −==εiimsFBCQV −=ϕ23Real Surfaces• Interface Charge:–Qm(Mobile ionic) Sodium atoms move around under electric field–Qot(Oxide trapped) Imperfections in SiO2cause charge to be trapped–Qf(Oxide fixed) Ionic silicon left over from oxidation process. –Qit(Interface trap) Charge due to abrupt interface of SiO2and Si.24Solve for VGWhile one can see that if you knew the surface potential (Ψs), you could easilyget VG, this is not what a circuit simulator needs. You apply a VG, then find a Ψs, and then get the charge. A “numerical method” is required such asThe secant or Newton Ralphson methods.25Surface Potential as a function of Gate Voltage010203040506070800 20 40 60 80 100 120 140(VG-VFB)/UTΨs/UT26Gate CapacitanceThe gate capacitance is the series connect of the oxide capacitance and the depletioncapacitance.27CV Curve28Capacitors• We can extract for the capacitors:– Long Channel VT of the transistors– VT of the parasitic transistors on the field oxide– Substrate doping– Fixed oxide charge– The capacitance of the oxide– In some cases you can extract the thickness of the oxide.29CapacitorsNMOS CV2.00E+022.50E+023.00E+023.50E+024.00E+024.50E+025.00E+025.50E+026.00E+026.50E+027.00E+027.50E+028.00E+02-10.00-9.00-8.00-7.00-6.00-5.00-4.00-3.00-2.00-1.000.001.002.003.004.005.00VG (V)CG (pF)\30A CV Curve can be used to extract important device data before a transistor is fabricated!NMOS CV2.00E+022.50E+023.00E+023.50E+024.00E+024.50E+025.00E+025.50E+026.00E+026.50E+027.00E+027.50E+028.00E+02-10.00-9.00-8.00-7.00-6.00-5.00-4.00-3.00-2.00-1.000.001.002.003.004.005.00VG (V)CG (pF)\You need to knowthe oxide thickness froman other measurement tool(Nanospec)Nb, N, VT, Qi, VFB31Find the Area and convert Cg max and Cg minimum to 1 dimension.NMOS CV2.00E+022.50E+023.00E+023.50E+024.00E+024.50E+025.00E+025.50E+026.00E+026.50E+027.00E+027.50E+028.00E+02-10.00-9.00-8.00-7.00-6.00-5.00-4.00-3.00-2.00-1.000.001.002.003.004.005.00VG (V)CG (pF)\From CV CurveFrom CV curve32Find the doping concentration by finding the minimum depletion capacitance.33Find the doping concentration by finding the minimum depletion capacitance.34Find the doping concentration by finding the minimum depletion capacitance.35To Find VT we need the flat band voltage. To find VFB we need CFB.36To find VFB we need CFB in F so we can look up the CFB, VFB pair from the original CV data.650pFNMOS CV2.00E+022.50E+023.00E+023.50E+024.00E+024.50E+025.00E+025.50E+026.00E+026.50E+027.00E+027.50E+028.00E+02-10.00-9.00-8.00-7.00-6.00-5.00-4.00-3.00-2.00-1.000.001.002.003.004.005.00VG (V)CG (pF)\VFB is very close to Zero!VFBIt would havebeen exactly zerobut reading thechart introduces errors.37VT for VFB=038N for weak inversionDesignNB is not 100% accurateDue to extraction simplification39Threshold Voltage (Al Gate))(2CQCQV)(2CQCQVFidiimsTFidiimsTPMOSNMOSϕϕϕϕ−−−=+−−=,)(2)(Q ,)(2)(Qengineer. processby you Given toQchannel) p andn (both )(F/cm) 103.9)(8.885(Cchannel) p andn (both chart fromGet 21d21di14-imsFdsFasqNpmosqNnmoscmdϕεϕεϕ=−==×=)(ln0259.)(ln0259.FPMOSnNNMOSnNidFia⎟⎟⎠⎞⎜⎜⎝⎛=⎟⎟⎠⎞⎜⎜⎝⎛=ϕϕ40Threshold VoltageVt for d=100Å, Qd=5x1010(cm-2)q-3.00-2.50-2.00-1.50-1.00-0.500.000.501.001.502.0012 13 14 15 16 17 18Log(Na, Nd (cm-3))Vt(V)Vt (n-channel)Vt (p-channel)41Calculating VTWhat would VT be if the substrate doping were NA=1016cm-3, Qi=5x1010q.cm2And d=1000Ǻ, with an Al Gate?42Calculating VT43Control of Threshold Voltage• Silicon gate technology–