EE 254 SAMPLE EXAM 3Mark each of the following as true or false.1. A sequential circuit must always have inputs in additional to a clock _____2. A 4 to 1 multiplexer is a good example of sequential logic. _____3. A sequence detector with 30 states requires a minimum of 5 flip flops. _____ 4. In the JK and D sequential circuit below flip flops A, B, and C are in the initial state 0, 1, 0 as shown. List the next four states for the circuit. State A B C0 0 1 012345. Fill in the truth table below for the circuit shown. The output for F may be either HIGHor LOW (2 stable states) or it may oscillate. 6. Answer the questions below for the system described by the next state diagram shown.A B F0 11 11 01 1a) Fill in the next state table.b) Use “D” positive edge triggered flip-flops, fill in the K-maps, and determine the next state equations for the D inputs.DA = _____________DB = _____________Y = _____________n n+1A B X A B Y0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1BX BX BXDA00 01 11 10 DB00 01 11 10 Y 00 01 11 10A 0 A 0 A 01 1 17. Given the JK circuit below: a) Construct the next state table for the circuit below. Take X as the input and A as the output.Present NextX A Ab) Write the Verilog code thatwill implement the circuit above:8. Given the Verilog module tothe right with theinputted signals to the moduleas shown below:Complete the waveform for Q as indicated below.9. Construct a state diagram, state table, K-maps, anddraw the circuit diagram of a sequential logic circuit thatwill operate as follows: When an input: X = 0 the logic should output the sequence ...00, 01, 10, 11 …repeating X = 1 the logic should output the sequence …11, 10, 01, 00 …repeatingmodule verilogcircuit(clk, D, Q); output Q; input clk, D; reg Q; always @ (negedge clk) begin Q <= ~D; end endmodule module jk (x, clk, j, k, A);