EE 110 Lab FPGA Intro Tutorial Fall 2009 1-1 FPGA Introductory Tutorial: Part 1 This tutorial is designed to assist in learning the basics of the Altera Quartus II v9.0 software. Part 1 of the tutorial will cover the basics of creating a Project, building a circuit using a Block Diagram, and then conducting a Functional Simulation to verify that the circuit is functioning as intended. Finally, the tutorial will cover how to program your FPGA board. Project Setup and Block Diagram: 1) Start the Quartus II software. By default, a shortcut to the program is located in the Engineering Applications folder within the Start menu of the lab computers. 2) Once the program loads, start a new project by going to File → New Project Wizard… An introductory screen will load describing the wizard. Click the Next button to start the wizard. 3) A screen similar to the one below will load. The working directory is where the files for your project are saved. You may save the files wherever you chose, but it is highly recommended you save your project in CEFNS‟ student file server named Kashyyyk. This will enable you to access your project from any computer in the lab. By default, your Kashyyyk drive is your “I:” drive. The name of the project and the name of the top-level design entity may be named whatever you choose. However, make note of the top-level design entity name, as you will need it later.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-2 4) Click the Next button. This screen will allow you to add files to your project. For this tutorial, we will not need to add any further files, so click Next button to move on to the next screen. 5) The next part of the tutorial will ask you to enter the type of FPGA chip that you plan on programming. Since we are programming a Cyclone II board, select Cyclone II as the device family. Then scroll down the Available devices list and select the appropriate chip. The chip name is physically printed on the Cyclone II chip located on your FPGA board. Note: The chip selected below may not match your chip; ensure you select the correct chip name. 6) After you select the correct chip, click Finish to end the wizard.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-3 7) Next, create a new Block Diagram file. To do this, click New… under the File menu. Select Block Diagram/Schematic File and click OK. 8) Now we will add our first logic element to our schematic. Click on the Symbol Tool located on the toolbar on the left (it looks like a miniature AND gate).EE 110 Lab FPGA Intro Tutorial Fall 2009 1-4 9) A window will appear asking you to select the symbol. For this tutorial we will use a 2-input AND gate. Expand the “primitives” folder, followed by the “logic” folder and select the 2-input AND gate (called “and2”). Click OK. 10) Your cursor will now appear with the 2-input AND gate attached. Click anywhere on your schematic to place the AND gate. 11) Next, return to the Symbol Tool. This time, select an input pin (located within the “primitives” → “pin” folder). Place two input pins on your schematic. Repeat the same step to place one output pin on your schematic. When done, your schematic should look similar to the one below:EE 110 Lab FPGA Intro Tutorial Fall 2009 1-5 12) Now connect your input pins to the two inputs on the AND gate, and the output pin to the output on the AND gate. This can be done by moving the cursor close a connection point until the cursor changes into a square target. Then click and drag your cursor to the matching connection point. Once finished, your schematic should look similar to the one below: 13) Next, the pin names need to be changed to their appropriate name. This can be done by right clicking on the pin, and editing the properties. Name your input pins A and B, and your output pin Y.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-6 14) Your Block Diagram is finished! Save your file in your working directory. MAKE SURE YOUR FILE NAME IS THE SAME NAME AS YOUR TOP-LEVEL DESIGN ENTITY NAME. You specified this name during the project creation wizard. If the names are different, the simulation and programming will not work. Functional Simulation: 1) Now that your schematic is created, we need to compile your circuit in order to prepare it for simulation. This can be done by pressing the purple play icon in the top toolbar. If your circuit won‟t compile because of errors, go back to your Block Diagram and fix your errors. If you need any help, ask your TA or instructor. 2) The next step is to create the input waveform plots used by the simulator. Create a new Vector Waveform by going to File → New… and select Vector Waveform File.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-7 3) Now we need to add the pins to the plot. This can be done by double clicking in the white space under the Name and Value at… title. Then select the Node Finder button. 4) Type “*” in the Named box. Change the Filter to “Pins: unassigned.” Then click the List button to list all of the available nodes. Select A, B, and Y and move them to the Selected Nodes list. Then click OK.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-8 5) Once all three pins are on the waveform plot, we need to set the values of the input pins for a successful simulation. To verify that the AND gate is working correctly, the simulation must cycle through all possible combination of inputs. Below is a list of all possible input combinations for a 2-input AND gate: Combination 1: A = 0, B = 0 Combination 2: A = 0, B = 1 Combination 3: A = 1, B = 0 Combination 4: A = 1, B = 1 Now we must input these combinations into the waveform plot. The value of a wave may be changed by dragging a box around the part of the wave to be edited. Once the wave is selected, clicking Forcing High or Forcing Low on the left toolbar will change the value to either a logical „1‟ or a logical „0‟. In the example below, “A” was selected between 10.0 ns and 20.0 ns and changed to a logical „1‟.EE 110 Lab FPGA Intro Tutorial Fall 2009 1-9 6) Continue editing the waveform plot until all four possible combinations are placed in the plot. Below is a waveform plot demonstrating a completed plot with all four possible combinations. 7) Once your plot is finished, save the file with an appropriate name of your choice in your working directory. 8) Now it is time to simulate your circuit. Start