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LCSL Logic Circuit Simulation Language Bogdan Caprita Julian Maller Sachin Nene Chaue Shen December 19 2003 Chapter 1 4 Introduction 4 1 1 Introduction 4 1 2 Background 4 1 3 Related Work 5 1 4 Goals 6 1 4 1 Simplicity 6 1 4 2 Portability 6 1 4 3 Modularity 6 1 4 4 Flexibility 6 1 4 5 Error Avoidance 6 1 5 Features 6 1 5 1 Components 6 1 5 2 Recursion 7 1 5 3 Overloading 7 Chapter 2 8 Tutorial 8 2 1 Simple Example 8 2 2 Compilation Simulation of Simple Example 9 2 3 A more complex example with recursion 10 Chapter 3 12 Reference Manual 12 3 1 Lexical Conventions 12 3 1 1 Comments 12 3 1 2 Variables 12 3 1 3 Keywords 12 3 1 4 Operators 12 3 1 5 Strings and Vectors 12 3 2 Types 12 3 2 1 Integers 13 3 2 2 Booleans 13 3 2 3 Vectors 13 3 2 4 Strings 13 3 2 5 Components 13 3 2 6 Systems 13 3 3 Type Operators 13 3 3 1 Integer Operators 14 3 3 2 Boolean Operators 14 3 4 Expressions 15 3 4 1 Expression Syntax 15 3 4 2 Basic Expressions 15 3 4 3 Source Expressions 16 3 4 3 Sink Expressions 16 3 5 Statements 16 3 5 1 Connections 17 3 5 2 Conditionals 17 3 5 2 Instantiations 17 3 5 3 VectorInput and VectorOutput 17 1 3 5 4 Set 18 Chapter 4 19 Project Plan 19 4 1 Team Responsibilities 19 4 2 Programming Style Guide 19 4 3 Project Timeline 20 4 3 Software Project Environment 20 4 3 1 Operating Systems 20 4 3 1 Java 1 4 2 20 4 3 2 CVS 20 4 3 3 Icarus 21 4 3 3 ANTLR 21 4 4 Project Log 21 Chapter 5 22 Architecture Design 22 5 1 Block Diagram 22 5 2 Description of Architecture 23 5 2 1 The Functional Programming Model 23 5 3 Authors of Components 26 Chapter 6 27 Testing Plan 27 6 1 Early Testing 27 6 2 Our compiler works 27 6 3 Running Verilog Code 28 6 4 Regression Testing 28 Chapter 7 30 Lessons Learned 30 7 1 Each Member s Lessons Learned 30 Appendix A 32 Appendix A 32 Source Code 32 A 1 Front End 32 A 1 1 Lexer 32 A 1 2 Parser 36 A 1 3 Walker 39 A 2 Back End 45 A 2 1 Admin java 45 A 2 2 ApplyFailedException java 56 A 2 3 Assignment java 56 A 2 4 BadVerilogException java 58 A 2 5 BitVector java 58 A 2 6 BitWire java 58 A 2 7 Bool java 60 A 2 8 Component java 60 A 2 9 CompPrim java 62 A 2 10 DuplicationException java 63 A 2 11 Environment java 63 A 2 12 EvalFailedException java 68 A 2 13 Expression java 68 A 2 14 ForceFailedException java 69 2 A 2 15 HierarchicalVariable java 69 A 2 16 IfStatement java 71 A 2 17 NameGenerator java 72 A 2 18 Number java 73 A 2 19 PrimitiveBinOp java 74 A 2 20 Primitive java 80 A 2 21 PrimitiveSet java 80 A 2 22 PrimitiveUnOp java 82 A 2 23 PrimitiveVecBinOp java 84 A 2 24 PrimitiveVectorInput java 92 A 2 25 PrimitiveVectorOutput java 94 A 2 26 PrimitveVecUnOp java 96 A 2 27 STEntry java 100 A 2 28 Str java 100 A 2 29 Sys java 101 A 2 30 Thunk java 103 A 2 31 UndefinedException java 104 A 2 32 Variable java 104 A 2 33 Wire java 106 A 2 34 Body java 106 A 3 Driver build files 107 A 3 1 Main java 107 A 3 2 build xml 110 A 4 Testing suite 111 A 4 1 Test Files 111 A 4 2 Regression Testing Script 127 3 Chapter 1 Introduction 1 1 Introduction The Logic Circuit Simulation Language LCSL has been built to design logical circuits in a new intuitive way The classical approach to building circuits has always been using declarative hardware design languages mainly because the building blocks used in these declarative programs are how the circuits are actually mapped out in the hardware But on a conceptual level human beings think of circuits in a different way that of a web of functions that have inputs and outputs This is where LCSL comes in With its functional programming philosophy LCSL allows users to design circuits at a highly conceptual level LCSL then transforms the code into the code of the popular declarative HDL Verilog so that the circuit can be simulated and synthesized By producing an extra layer of abstraction LCSL frees the user from worrying about the nitty gritty of long convoluted code of Verilog that is necessary for the actual production of the circuit 1 2 Background The logic circuit is an integral part of the transistors that are in virtually all aspects of computational electronics from the airbags in a car to the alarm in a watch The fundamental aspect of a logic circuit is that it operates on a digital signal that always carries one of only two values The representation of these values varies through different technologies whether it is a high or low voltage at a very low hardware level or Boolean representations of true and false in a highlevel programming language Logic circuits act as a physical representation of a mathematical or logical function between a set of inputs and a set of outputs Inputs are usual carried in by bit wires that carry a high or low voltage which again can be translated to true false values on a very high level The physical medium that is a circuit transforms these signals in such a way as to produce a specific set of outputs that are sent out by bit wires as well Combining several of these function circuits results in a useful tool for data whether it be simple mathematical functions such 4 as adding and subtracting or at a much more complex level displaying graphics on a CRT monitor The average microchip in a computer contains millions upon millions of these circuits forming the processing power of today s computing products A structural representation is always a key component of the design process of a digital logical circuit More and more software and simulation is becoming an essential part of most fields of experimentation Circuit research is not an exception and simulation through software before even touching a piece of silicon is vital in making the exercise more efficient and worthwhile Designing a digital logic circuit on a computer and simulating it with various inputs allows electrical engineers to tweak and prod at their discretion without the expense of materials or loss of valuable time 1 3 Related Work The two hardware design languages that have ruled the circuit design landscape for the past twenty years have been Verilog and VHDL Both languages implement all steps of the hardware design process conceptual design simulation …


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Columbia COMS W4115 - LCSL Logic Circuit Simulation Language

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