Laboratory Six Standard Combinational Logic Circuits Basic Concepts 1. Earliest standard forms of digital logic circuit were constructed from SSI and MSI integrated circuits (ICs) based upon TTL and CMOS technologies. We will look at several “classic” circuits of the 1960’s and 70’s today. 2. Logic circuits may be constructed by mounting ICs on breadboards and: a. Connecting holes with wires. b. Connecting switches and lights with wires. c. Using pin numbers for ICs to locate inputs and outputs. d. Connecting power (5V and GND) to ICs. 3. NAND/NOR gates are less expensive than AND/OR gates 4. Two-level NAND circuits realize SOP functions. 5. Two-level NOR circuits realize POS functions. 6. Decoders and MUXes (which utilize minterms) can also be employed to implement logic circuit designs. Note: This prelab has 8 parts and is worth 10 pts. Task One: NAND & NOR Circuits Circuits are rarely built with the basic AND, OR and NOT gates. This is because most circuits can also be constructed from less expensive gates, such as the NAND, NOR and XOR. The most famous digital logic gate is the 7400 2-input NAND gate. This gate is part of a quad TTL NAND gate IC that was developed by several manufacturers in the 1960’s. The two-level NAND-NAND circuit can implement functions in SOP (sum of products) form, while the two-level NOR- NOR circuit implement functions in POS (product of sums) form. 1. Two-level NAND circuit. a. (Pre) Symbols for the NAND and NOR gates are shown at upper right. The OR2B2 is an equivalent symbol for a NAND gate, obtained from DeMorgan’s law. Redraw the two-level NAND-NAND circuit shown at right, using one OR2B2 symbol, so this circuit may be viewed in terms of basic AND and OR shapes. b. (Pre) Write an expression for F and its truth table. c. Mount a 7400 NAND gate on the red box, and connect the inputs to 2 switches and the output to a LED. Draw an experimental truth table for the 2-input NAND. d. Show how to make an inverter from a NAND gate, draw this circuit, and confirm its operation. e. Build the NAND-NAND circuit shown at right on the red box, using 7400 SSI gates, and record a truth table confirming your results.2. Two-level NOR circuit. a. (Pre) Repeat 1 a & 1 b for the NOR circuit above, using the AND2B2 symbol, to redraw the NOR-NOR circuit into an equivalent form. b. Swap the 7400 chip for a 7402 IC. (Mount it upside down to reverse the direction of the gates. Also exchange Power with Ground). Record a truth table for one of the 2-input NOR gates on the red box. c. Finally, verify the entire NOR-NOR circuit with a truth table in your lab notebook. Task Two: 3-line to 8-line Decoder The 74138 MSI 3 to 8 decoder is defined in Table 5.3, and is the simplest of the decoders of earlier labs. 1. (Pre) Draw the 3-to-8 decoder symbol given at right in your lab notebook. It is a bit simpler than the 74138 given in Fig 5.10. Use pin numbers for the MSI decoder. 2. (Pre) The purpose of a 3-to-8 decoder is to activate one of eight outputs depending upon the input select lines C, B and A. The decoder equation is Yi miE where imis the ith minterm of the select line variables. Draw a simplified truth table of Table 4.3 for the active-low outputs iY assuming E is high. [E represents a combination of three enabling inputs in that Table.] 3. Build on the red box, connecting inputs CBA to switches and outputs to LEDs. (Ground AE1 andAE2). Check to see if the device obeys your truth table. 4. What is the effect of grounding enabling input E1? 5. Attach NAND element to those decoder outputs pins which allow it to “sum” minterms 2, 3, 5 and 6 and record a truth table. Draw a schematic of your summing circuit in your lab notebook. Draw the NAND as an ORing symbol, as in Task One. 6. Construct the “minterm summing” circuit using the generic D3_8E block model from the schematic library, using the procedure outlined in Lab 2. Simulate your result using the proper .do file. Note that the outputs in the Xilinx decoder model are active-high this time. What should your ORing element be now? 7. Download your design into the Digilent board, using the procedure of Lab 4. Define the select inputs as SWs and the output F as an LED in the .ucf file. After generating the programming file, implement the design using adept. Determine the experimental truth table from the LED pattern observed.Task Three: 8-line to 1-line Multiplexer The multiplexer is discussed in Section 5.4, and the Xilinx MSI 8 line to 1 line MUX is given at right. 1. (Pre) Draw the 8 to 1 MUX symbol in your lab notebook. Use pin numbers for the MSI MUX. 2. (Pre) The purpose of the 8 to 1 MUX is to select and route one of eight inputs to the output. The MUX equation is 771100... mDmDmDY . Draw a simplified truth table shown for active-high output Y as well as for the active-low output W, in terms of input variables Di. The MUX table is not in the textbook, so please follow this example for one row: for CBA = 011, the table entries will be 3DY and 3DW . 3. Build the MUX on the red box, using the 74151 IC, connecting inputs CBA to switches and outputs to LEDs. Check to see if the device obeys your truth table. 4. Connect the D input pins which allow it to “sum” minterms 2, 3, 5 and 6 and record a truth table. 5. Construct the MUX circuit using the generic M8_1E block model in Xilinx , which is identical to the block at right. Use the Di pattern (connecting to VCC or GND) to allow the MUX to “sum” minterms 2, 3, 5 and 6, and download your design into the Digilent board, after simulating the result. Determine an experimental truth table from the LED pattern