Lecture 2:Lecture 2:Architectural Support forArchitectural Support forOperating SystemsOperating SystemsCSE 120: Principles of Operating SystemsAlex C. SnoerenHW1 Due Tuesday 10/4CSE 120 – Lecture 2: Architectural Support for OSes 2AdministriviaAdministrivia Mailing list◆ Not yet set up. Hopefully by Thursday. Homework #1◆ Due 10/4 at the beginning of class◆ Hardcopy required, no emailed homeworks Project groups◆ Send your group info to Jose ([email protected]) Office hours◆ Thursday 1-2pmCSE 120 – Lecture 2: Architectural Support for OSes 3Why Start With Architecture?Why Start With Architecture? Operating system functionality fundamentally dependsupon the architectural features of the computer Architectural support can greatly simplify – orcomplicate – OS tasks◆ Early PC operating systems (DOS, MacOS) lacked virtualmemory in part because the architecture did not support it◆ Early Sun 1 computers used two M68000 CPUs to implementvirtual memory (M68000 did not have VM hardware support)CSE 120 – Lecture 2: Architectural Support for OSes 4Types of Arch SupportTypes of Arch Support Manipulating privileged machine state◆ Protected instructions◆ Manipulate device registers, TLB entries, etc. Generating and handling “events”◆ Interrupts, exceptions, system calls, etc.◆ Respond to external events◆ CPU requires software intervention to handle fault or trapCSE 120 – Lecture 2: Architectural Support for OSes 5Architectural Features for OSArchitectural Features for OS Features that directly support the OS include◆ Protection (kernel/user mode)◆ Protected instructions◆ Memory protection◆ System calls◆ Interrupts and exceptions◆ Timer (clock)◆ I/O control and operation◆ Synchronization (atomic instructions)CSE 120 – Lecture 2: Architectural Support for OSes 6Protected InstructionsProtected Instructions A subset of instructions of every CPU is restricted touse only by the OS◆ Known as protected (privileged) instructions Only the operating system can◆ Directly access I/O devices (disks, printers, etc.)» Security, fairness (why?)◆ Manipulate memory management state» Page table pointers, page protection, TLB management, etc.◆ Manipulate protected control registers» Kernel mode, interrupt level◆ Halt instruction (why?)CSE 120 – Lecture 2: Architectural Support for OSes 7OS ProtectionOS Protection How do we know if we can execute a protectedinstruction?◆ Architecture must support (at least) two modes of operation:kernel mode and user mode» VAX, x86 support four modes; earlier archs (Multics) even more» Why? Protect the OS from itself (software engineering)◆ Mode is indicated by a status bit in a protected control register◆ User programs execute in user mode◆ OS executes in kernel mode (OS == “kernel”) Protected instructions only execute in kernel mode◆ CPU checks mode bit when protected instruction executes◆ Setting mode bit must be a protected instructionCSE 120 – Lecture 2: Architectural Support for OSes 8Memory ProtectionMemory Protection OS must be able to protect programs from each other OS must protect itself from user programs May or may not protect user programs from OS Memory management hardware provides memoryprotection mechanisms◆ Base and limit registers◆ Page table pointers, page protection, TLB◆ Virtual memory◆ Segmentation Manipulating memory management hardware usesprotected (privileged) operationsCSE 120 – Lecture 2: Architectural Support for OSes 9EventsEvents An event is an “unnatural” change in control flow◆ Events immediately stop current execution◆ Changes mode, context (machine state), or both The kernel defines a handler for each event type◆ Event handlers always execute in kernel mode◆ The specific types of events are defined by the machine Once the system is booted, all entry to the kerneloccurs as the result of an event◆ In effect, the operating system is one big event handlerCSE 120 – Lecture 2: Architectural Support for OSes 10Categorizing EventsCategorizing Events Two kinds of events, interrupts and exceptions Exceptions are caused by executing instructions◆ CPU requires software intervention to handle a fault or trap Interrupts are caused by an external event◆ Device finishes I/O, timer expires, etc. Two reasons for events, unexpected and deliberate Unexpected events are, well, unexpected◆ What is an example? Deliberate events are scheduled by OS or application◆ Why would this be useful?CSE 120 – Lecture 2: Architectural Support for OSes 11Categorizing Events (2)Categorizing Events (2) This gives us a convenient table:◆ Terms may be used slightly differently by various OSes, CPUarchitectures…◆ Software interrupt – a.k.a. async system trap (AST), async ordeferred procedure call (APC or DPC) Will cover faults, system calls, and interrupts next◆ Does anyone remember from CSE 141 what a softwareinterrupt is?software interruptinterruptInterrupts (async)syscall trapfaultExceptions (sync)DeliberateUnexpectedCSE 120 – Lecture 2: Architectural Support for OSes 12FaultsFaults Hardware detects and reports “exceptional” conditions◆ Page fault, unaligned access, divide by zero Upon exception, hardware “faults” (verb)◆ Must save state (PC, regs, mode, etc.) so that the faultingprocess can be restarted Modern OSes use VM faults for many functions◆ Debugging, distributed VM, GC, copy-on-write Fault exceptions are a performance optimization◆ Could detect faults by inserting extra instructions into code (ata significant performance penalty)CSE 120 – Lecture 2: Architectural Support for OSes 13Handling FaultsHandling Faults Some faults are handled by “fixing” the exceptionalcondition and returning to the faulting context◆ Page faults cause the OS to place the missing page intomemory◆ Fault handler resets PC of faulting context to re-executeinstruction that caused the page fault Some faults are handled by notifying the process◆ Fault handler changes the saved context to transfer control toa user-mode handler on return from fault◆ Handler must be registered with OS◆ Unix signals or NT user-mode Async Procedure Calls (APCs)» SIGALRM, SIGHUP, SIGTERM, SIGSEGV, etc.CSE 120 – Lecture 2: Architectural Support for OSes 14Handling Faults (2)Handling Faults (2) The kernel may handle unrecoverable faults by
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