12.810 Manufacturing Processes and Systems12.810Integrated Circuit (IC) Manufacturing ProcessesProf. Duane Boning (EECS)• Overview of semiconductor manufacturing process flows• Physics of key unit processes– Oxidation– Ion Implantation–Diffusion– Etching– Lithography– Deposition– Planarization• Sources– Most slides (except planarization) based on Plummer, Deal and Griffin, “Silicon VLSI Technology, Fundamentals, Practice and Modeling, Prentice Hall, 2000.– 6.774 class notes (Judy Hoyt)2Wafer Scale Chip Scale Transistor ScaleIC Fabrication Process• Silicon transistor technology:– Defined by smallest “critical dimension” (CD)– Current technology 65nm • Highly integrated– In most densely packed chips (e.g. memory), approximately 1 billion transistor per chip threshold has been been reachedp-Strained Sigate oxide130 Å750 Ån+p-Si1-xGex Graded Layer 6000 Åx = 0.05x = 0.2p+Si Substrate1.5 μmp-Relaxed Si0.8Ge0.2 p+ Si0.8Ge0.2Punch-through stop60 Ån+ polyLTOSpacern+High electron-mobilitychannel3For 2001 ITRS see URL: http://public.itrs.net/IC Device Components4Basic Patterning Process5Silicon Oxidation - Mechanism6Oxidation Equipment22.810 Manufacturing Processes and Systems7Deal-Grove Oxidation Model• Combining:8Deal-Grove Model, cont’d9Deal-Grove Model, cont’d10Simulation of Local Oxidation of Silicon11Ion Implantation12Ion Implant – Profiles in Silicon32.810 Manufacturing Processes and Systems13Implant Equipment14Ion Implant – Masking & Shadowing15Implant Profile After Annealing• Thermal anneal is requiredto remove damage, electricallyactivate dopants, and positionwhere desired16Ion Implant – Channeling17Diffusion18Diffusion Basics42.810 Manufacturing Processes and Systems19Diffusion Basics20Example: Diffusion from a Fixed Source21Etching22Etch – Isotropic vs. Anisotropic23Plasma Etching24Plasma Chemistry52.810 Manufacturing Processes and Systems25Plasma Etch – Surface Chemistry26Plasma Etch – Neutral vs. Ion/Physical Etch27Plasma Etch – Reactive Ion Assisted Etching28Lithography – Design to Mask to Wafer29Lithography30Lithography – Wafer Exposure Systems62.810 Manufacturing Processes and Systems31Lithography – Photoresists32Lithography – Imaging Issues33Litho – Optical Proximity Correction (OPC)34Litho – Phase Shift Masks35Lithography Equipment36Lithography Equipment – Wafer Track72.810 Manufacturing Processes and Systems37Deposition38Chemical Vapor Deposition (CVD) Equipment39CVD Physics40Physical Vapor Deposition (PVD)41Sputter Deposition42Planarization82.810 Manufacturing Processes and Systems43Chemical Mechanical Planarization (CMP)44Types of CMP45CMP – Preston’s Model46CMP – Structure Profile EvolutionInitial step height 5000 A55CMP – Structure Profile EvolutionFinal step height 600 A56Oxide CMP92.810 Manufacturing Processes and Systems57Shallow Trench Isolation (STI) CMP58Copper Damascene59CMP Issue: Pattern Dependencies60Summary – Semiconductor Unit Processes• Oxidation• Ion Implantation• Diffusion•Etching• Lithography• Deposition• Planarization61Additional Semiconductor Processes• Crystal Growth• Silicon Epitaxy• Electrodeposition•
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