Memory Computer Architecture CS 215 Memory Hierarchy Increasing performanc e cost Registers Cache Main memory Secondary storage Off line storage Random Access Memory SRAM Static RAM Based on flip flops Content persists as long as current is present DRAM Dynamic RAM Employs a capacitor Stores minute charge for each bit Charge dissipates requiring periodic refresh Susceptible to premature discharging Chip Organization New RAM from Old Two 4 word by 4 bit RAMs make up an 8Word by 4Bit RAM Commercial Memory Modules Address Inputs Column Address Strobe Data In Data Out No Connection Row Address Strobe 5 V Supply A0 A9 CAS DQ1 DQ8 NC RAS Vcc Ground Vss Write Enable W Read Only Memory Note how each decoder output is connected to specific OR gates What is value of Q when A is 10 Cache Memory Associative Mapped Direct Mapped Set Associative Mapped Performance Hit Ratios Effective Access Times Multilevel Management Associative Mapped Assume 232 word memory 227 blocks of 25 32 words per block Cache consists of 214 slots If the addressed word is in the cache it will be found in a slot that has tag made up of the 27 most significant bits of the address If the addressed word is not in the cache then the block brought into an available slot in the cache from the main memory and the memory reference is then satisfied from the cache Associative Mapped Replacement policy Associative and set associative mapping schemes and also for virtual memory Least recently used LRU First in first out FIFO Least frequently used LFU Random Optimal used for analysis only look backward in time and re verse engineer the best possible strategy for a particular sequence of memory references Direct Mapped Each Block can be mapped to only one slot but Each slot can be maped to more than one block Example Cache Main 3 Slot 0 Block 0 0 255 Slot 1 Block 1 256 511 Slot 2 Block 2 512 767 Block 3 768 1023 Block 4 1024 1279 Block 5 1280 1535 Block 6 1536 1791 Block 7 1792 2047 Access M 776 Choose Slot 0 Copy Block 3 into Slot 0 Example Cache Main 3 Slot 0 Block 0 0 255 5 Slot 1 Block 1 256 511 Slot 2 Block 2 512 767 Block 3 768 1023 Block 4 1024 1279 Block 5 1280 1535 Block 6 1536 1791 Block 7 1792 2047 Access M 1296 Choose Slot 1 Copy Block 5 into Slot 1 Example Cache Main 3 Slot 0 Block 0 0 255 5 Slot 1 Block 1 256 511 0 Slot 2 Block 2 512 767 Block 3 768 1023 Block 4 1024 1279 Block 5 1280 1535 Block 6 1536 1791 Block 7 1792 2047 Access M 64 Choose Slot 2 Copy Block 0 into Slot 2 Example Cache Main 3 Slot 0 Block 0 0 255 5 Slot 1 Block 1 256 511 0 Slot 2 Block 2 512 767 Block 3 768 1023 Block 4 1024 1279 Block 5 1280 1535 Block 6 1536 1791 Block 7 1792 2047 Access M 1536 Which slot should be used Hit Ratios Hit Referenced word is in cache memory Block previously loaded Miss Referenced word is not in cache Block needs to be loaded Effective Access Times Multilevel Virtual Memory Overlays Paging Fragmentation Virtual vs Cache Overlays Overlays Main Routine Subroutine A Overlays Main Routine Subroutine B Subroutine C Virtual Memory Virtual memory is stored in a hard disk image The physical memory holds a small number of virtual pages in physical page frames Paging Page table maps between virtual memory and physical memory Column 1 Is page occupied Column 2 Hard disk starting address Column 3 Physical address prefix