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ASU EEE 202 - Voltage Divider Stack and Delta-Wye

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Name: Class Instructor: TA: Session: 1 Voltage Divider Stack and Delta-Wye Lab 5a Lab Work Grade For Voltage Divider Stack Circuit: R VR (Theoretical) VRs (Measured) 1kΩ 2kΩ 5kΩ 2kΩ 1kΩ Delta - Wye Transformation: 1) What is the source current for the circuit shown in slide 6? Answer:Name: Class Instructor: TA: Session: 2 2) Solve for R6, R7, R8 using ∆↔Y transformation. (Show calculations) Answer: 3) What is the source current for the circuit shown in slide 7? Answer: 4) What is the source current for the circuit shown in slide 8? Answer: 5) What is the source current for the circuit shown in slide 9? Answer: 6) Are both source currents measured for circuits from slides 8 and 9 same? Why? Answer: NOTE: Your schematic print out MUST show voltages and currents displayed by PSpice and also the plots. Show your calculations for Delta to Wye transformation. Lab Data Sheet: Attach your hand written Data Sheet with notes taken during the lab. The Data Sheet must be signed by your lab


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ASU EEE 202 - Voltage Divider Stack and Delta-Wye

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