San Jose State University Introduction to Integrated Circuits Processing and Design MatE / EE 129, Section 001 http://www.mbuie.homestead.com/MatE129 Lecture: Thursdays 4:30 pm – 6:20 pm Location: Engineering 232 Instructor: Dr. Melisa Buie Adjunct Faculty Engineering Building, Room 385 Phone 408-568-3120 (please do not call after 8 pm) email: [email protected] Office hours: I will be available from 6:30 to 7 pm immediately following class on Thursdays. Since I am not on campus full time, email is usually the best way to get time with me outside of class or immediately following class. Course description: Basic processes involved in fabrication of integrated circuits; semiconductor physics, material preparation, oxidation, diffusion, photolithography, thin-film deposition, and etching. Simple component layout and evaluation of device parameters. Prerequisites: MatE 25 or MatE 153 Required text: Silicon VLSI Technology: Fundamentals, Practice and Modeling, by James D. Plummer, Michael D. Deal, and Peter B. Griffin Learning objectives: It is the intention of this class to provide the student with a working knowledge of basic integrated circuit fabrication steps and their impact on device performance. This will be applied to the fabrication and characterization of these devices by the student in San Jose State’s Solid State Laboratory. Grade Requirements: Homeworks 20% Midterms 20% Final Exam 20% Laboratory 40% Your own commitment to learning, as evidenced by your enrollment at San José State University, and the University’s Academic Integrity Policy requires you to be honest in all your academic course work. Faculty members are required to report all infractions to the Office of Student Conduct and Ethical Development. The policy on academic integrity can be found at http://sa.sjsu.edu/student_conduct. If you need course adaptations or accommodations because of a disability, or if you need special arrangements in case the building must be evacuated, please make an appointment with me as soon as possible, or see me during office hours. Presidential Directive 97-03 requires that students with disabilities requesting accommodations must register with DRC to establish a record of their disability.” You are responsible for understanding the policies and procedures about add/drops, academic renewal, withdrawal, etc. found at http://sa.sjsu.edu/student_conduct.Date Class Topics Suggested Reading (Plummer) Homework August 23, 2007 Introduction to Semiconductors & Basic NMOS process flow Chapter 1 Homework 1 Assigned August 30, 2007 Single Crystal Silicon Growth Chapter 3 Homework 1 Due September 6, 2007 Cleanroom Processing Chapter 4 Homework 1 Returned Homework 2 Assigned September 13, 2007 Lithography Chapter 5 September 20, 2007 Thermal Oxidation Chapter 6 Homework 2 Due Homework 3 Assigned September 27, 2007 Diffusion Chapter 7 Homework 3 Due Homework 4 Assigned October 4, 2007 Exam October 11, 2007 Etching Chapter 10 Homework 4 Due Homework 5 Assigned October 18, 2007 Ion Implantation Chapter 8 October 25, 2007 Deposition Chapter 9 Homework 5 Due Homework 6 Assigned November 1, 2007 Deposition Chapter 9 November 8, 2007 Chemical Mechanical Planerization Chapter 9 Homework 6 Due November 15, 2007 Exam November 22, 2007 Thanksgiving Break No Class November 29, 2007 Process / Device Performance Interactions Chapter 2 Howework 6 returned December 6, 2007 FEOL / BEOL Chapter 11December TBD, 2007 Final