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U of U ECE 3720 - Lecture 2- I O Ports
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Slide 1'&$%ECE/CE 3720: Embedded System Design(ECE 6960/2 and CS 6968)Chris J. MyersLecture 2: I/O PortsSlide 2'&$%Fanout RequirementsIOHIIHIIHIIHIIHOutputwhenhighINPUTINPUTINPUTINPUTIOLIILIILIILIILOutputwhenlowINPUTINPUTINPUTINPUT1Slide 3'&$%I/O CurrentsFamily IOHIOLIIHIILStandard TTL 0.4mA 16mA 40µA 1.6mASchottky TTL 1mA 20mA 50µA 2mALow-power Schottky TTL 0.4mA 4mA 20µA 0.4mAHigh-speed CMOS 4mA 4mA 1µA 1µA68HC11 0.8mA 1.6mA 1µA 1µA• fan-out = minimum(IOH/IIH,IOL/IIL)Slide 4'&$%Voltage Thresholds2Slide 5'&$%Open-Collector Gates• R ≤ (+5 − Vout)/IoutSlide 6'&$%Memory-Mapped Computer System3Slide 7'&$%Isolated I/O Computer SystemsSlide 8'&$%Read/Write Cycles4Slide 9'&$%DMA Read/Write CyclesSlide 10'&$%Input Ports5Slide 11'&$%Readable Output PortSlide 12'&$%Bidirectional Ports6Slide 13'&$%Definitions for I/O PortsPORTA equ $1000 PA7 i/o, PA6-PA3 outputs, PA2-PA0 inputsPACTL equ $1026 Bit 7 specifies whether PA7 is i/oPORTB equ $1004 PB7-PB0 are all readable outputsPORTC equ $1003 PC7-PC0 can be input or outputDDRC equ $1007 Direction register for Port C...#define PORTA *(unsigned char volatile *)(0x1000)#define PACTL *(unsigned char volatile *)(0x1026)#define PORTB *(unsigned char volatile *)(0x1004)#define PORTC *(unsigned char volatile *)(0x1003)#define DDRC *(unsigned char volatile *)(0x1007)...Slide 14'&$%Software to Read PortA and Write PortBNotGate ldaa PORTA Read from Port A into Reg Acoma Logical complementstaa PORTB Write from Reg A to Port Bbra NotGatevoid main(void) { unsigned char data;while(1) {data = PORTA; // Read from Port Adata = ~data; // Logical complementPORTB = data; // Write from Reg A to Port B}}7Slide 15'&$%Simple I/O Softwareclr DDRC Set Port C to input DDRC = 0x00;ldaa PORTC Read Port C into Reg A H = PORTC;staa H Store result into memoryldaa #$FF Load all 1’s into Reg A DDRC=0xFF;staa DDRC Set Port C to outputInit staa DDRC void Init(unsigned char Value) {rtsDDRC=value; }Set staa PORTCvoid Set(unsigned char Value) {rtsPORTC=value; }Read ldaa PORTCint Read() {rtsreturn(PORTC); }Slide 16'&$%I/O Examplevoid init(void){DDRC = 0xF0;} // PC7-PC4 outputs, PC3-PC0 inputsvoid main(void){init(); // call ritual oncewhile(1){data=PORTC; // inputdata=(~data)<<4; // complement and shiftPORTC=data;}} // output8Slide 17'&$%A 4-bit NOT GatePORTC equ $1003 ;I/O portDDRC equ $1007init ldaa #$F0 ;PC7-PC3 outstaa DDRC ;PC3-PC0 inrtsorg $E000 ;ROMmain lds #$00FF ;SP=$00FFbsr init ;ritualloop ldaa PORTC ;inputcoma ;logical notlsla ;shiftlslalslalslastaa PORTC ;outputbra loop ;repeatorg $FFFEfdb main ;reset


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U of U ECE 3720 - Lecture 2- I O Ports

Course: Ece 3720-
Pages: 5
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