UNM CMPE 310 - CMPE 310 LECTURE NOTES (12 pages)

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CMPE 310 LECTURE NOTES



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CMPE 310 LECTURE NOTES

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Pages:
12
School:
The University of New Mexico
Course:
Cmpe 310 - Systems Design and Programming
Systems Design and Programming Documents

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IVERSITY O F Linux Device Drivers V M YLAND BA L 1966 U M B C AR CMPE 310 UMBC 1 May 11 2000 2 08 pm unsigned inl unsigned port void outl unsigned doubleword unsigned port The 32 bit versions in which doubleword is defined as unsigned long or unsigned int according to the platform unsigned inw unsigned port void outw unsigned short word unsigned port The 16 bit versions unsigned inb unsigned port void outb unsigned char byte unsigned port Read and write 8 bit wide ports The port argument is defined as unsigned long on some and unsigned short on other platforms First we will look at the kernel functions that allow communication to 8 bit 16 bit and 32 bit I O ports Hardware Management We will develop code that is designed to control the parallel port Systems Programming MO UN TI RE COUNT Y Linux Device Drivers V CMPE 310 IVERSITY O F M YLAND BA L 1966 U M B C AR UMBC 2 May 11 2000 2 08 pm Data written to the output port shows up on the output pins of the 25 pin connector at standard TTL levels 0 and 5 volts w threshold of 1 2 V Parallel Port The parallel port in its minimal confi guration is made up of a few 8 bit ports There are also string functions defi ned as follows void insb unsigned port void addr unsigned long cnt void outsb unsigned port void addr unsigned long cnt Along with the w and l versions for 16 bit and 32 bit transfers Parallel Port On the 80x86 it is possible that the processor tries to transfer data too quickly to and from the bus particularly if the I O instructions are back to back There are inb p and outb p pause versions of the above functions You can use SLOW DOWN IO macro to add the delay also Systems Programming MO UN TI RE COUNT Y IVERSITY O F 8 7 6 5 4 3 8 2 M YLAND BA L 1966 U M B C AR UMBC 7 6 5 4 3 2 1 0 Status Port base addr 1 11 10 12 13 15 9 Data Port base addr 0 7 6 5 4 3 2 1 0 14 15 16 17 18 19 20 21 22 23 24 25 3 DB25 1 2 3 4 5 6 7 8 9 10 11 12 13 CMPE 310 May 11 2000 2 08 pm Output Control Input Data Input Status Inverted irq



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