1Computer System DesignLecture 6: Control Flow InstructionsProf. R. Iris BaharEN164February 8, 2007Reading: Appendix B, section B.1-B.7, Appendix J (optional) EN164Lecture 6-2Course Website and TA HoursTA Hours for lab 1:Mickey 1 – 4pmSat.Fri.Brian 7–10pmMickey 1 – 4pmMickey 3 – 6pmBrian 7–10pm2/12 –2/16Brian 7–10pmBrian 7–10pmMickey 3 – 6pm2/5 –2/10Thurs.Wed.Tues.Mon.WeekUpdates to these hours will also be posted on the course web pagePlease confirm you have an account on the ENGIN cluster ASAP !!EN164Lecture 6-3Jobs at Cisco• Cisco is looking for full-time as well as summer intern hires.• Jobs for both HW and SW engineers to work on:–wireless LAN, – IP telephony, – security, – digital video, – network management, routing, switching …• For more information, and to apply, go to:http://tools.cisco.com/careers/applicant/ciscorm/university/applicant/EN164Lecture 6-4Engineers Week• February 18-24• Wednesday, Feb 21, 5pm:–Dinner with Cisco and speaker on recycling– How does technology make a social impact• Thursday, Feb 22, 5pm–Engineering as art photography show– Cash prizes awarded• Friday, Feb. 23, 6pm–Elevator pitch competition on the RI wireless initiative– Pitch an idea that uses the proposed statewide network• Saturday, Feb. 24, 10am–Build a functional product from recycled materials EN164Lecture 6-6Interpreting Memory Addresses• Most computers are byte addressed and also allow access to half words (16 bits), words (32), and double words (64)• Accesses are usually required to be aligned: a half word cannot have an odd address, a double word must have an address A, where A mod 8 = 0, etc.• Misalignment increases hardware complexity and worsens performance (if data cross cache line boundaries)EN164Lecture 6-7Little and Big Endian• Consider a 64-bit quantity, composed of bytes 0-7 (LSB-MSB)• In Little-Endian format, memory address A will contain byte 0, address A+1 will contain byte 1,….address A+7will contain byte 7–Advantage: easier to organize bytes, half-words, words, double words, etc. into registers (Alpha, x86)• In Big-Endian format, memory address A will contain byte 7, address A+1 will contain byte 6,… address A+7will contain byte 0– Advantage: values are stored in the order they are printed out, the sign is available early (Motorola)2EN164Lecture 6-8“Endianness” Example• Consider the hexadecimal number:MSB 0x 43fa27c77156ab91 LSB•Two options:43fa27c77156ab91 address 7 6 5 4 3 2 1 091ab5671c727fa43Little-endianBig-endianEN164Lecture 6-9Common OperationsCompression/decompression, vertex/pixel opsGraphicsMove, compare, searchStringDecimal add, sub, mult, decimal to character conversionsDecimalFP add, sub, mult, divFloating pointOS call, virtual memory managementSystemBranch, jump, call, returnControlLoads/storesData transferAdd, sub, and, or, mult, divArithmetic/LogicalExamplesOperator TypeEN164Lecture 6-10Operation Frequency4%Move register-register2%Call/Return5%Sub6%And8%Add12%Store16%Compare20%Conditional branch22%LoadInteger average (% total executed)80x86 instructionTop 10 instructions executed for a collection of integer programsEN164Lecture 6-11Control Transfer Instructions• Conditional branches (75% - Integer) (82% - FP)• Jumps (6% - Integer) (10% - FP)• Procedure calls/returns (19% - Integer) (8% - FP)• Design issues:–How do you specify the condition?– How do you specify the target address?– What happens on a procedure call/return?EN164Lecture 6-13Specifying the ConditionComplex pipelinesOne instruction instead of twoComparison is part of the branchPA-RISC, VAXCompare and branchRegister pressureSimpleComparison sets register and this is testedAlpha, MIPSCondition RegisterCC is extra state. Instructions cannot be re-orderedSometimes condition is set for freeTests special bits set by ALU ops80x86, ARM, PowerPC,SPARCCondition Code (CC)DisadvantagesAdvantagesHow condition is testedExamplesNameEN164Lecture 6-14• Decision making instructions–alter the control flow,– i.e., change the "next" instruction to be executed• MIPS conditional branch instructions:bne $t0, $t1, Label # branch if not equalbeq $t0, $t1, Label # branch if equal • Example (if): if (i==j) h = i + j;bne $s0, $s1, Labeladd $s3, $s0, $s1Label: ....Control3EN164Lecture 6-15• MIPS unconditional branch instructions:j label• Example (if - then - else):if (i!=j) beq $s4, $s5,Label1h=i+j; add $s3, $s4, $s5else j Label2h=i-j; Label1: sub $s3, $s4, $s5Label2: ...ControlEN164Lecture 6-16• Example (loop):Loop: ----i=i+j;if(i!=h) go to Loop---• Loop: ---add $s1, $s1, $s2 #i=i+jbne $s1, $s3, Loop---ControlEN164Lecture 6-17• We have: beq, bne, what about Branch-if-less-than?• New instruction: set on less thanif $s1 < $s2 then$t0 = 1slt $t0, $s1, $s2 else $t0 = 0• slt and bne can be used to implement branch on less thanslt $t0, $s1, $s2bne $t0, $zero, Less• Note that the assembler needs a register to do this. • We can now build general control structuresControl FlowEN164Lecture 6-18Translating C to Assembly//sum the first n-1 integers int sum=0; int i=0; while(i < n){ sum= sum + i; i++; } init: LOCO 0 STOD sum STOD i loop: LODD i SUBD n JPOS loopendbody: LODD sum /load sum into accumulatorADDD i /add i to it STOD sum incr: LOCO 1 ADDD i STOD i JUMP loop loopend: ... Assume an accumulator architecture. How do I translate the “while” loop into assembly?Through which means is the condition tested here?EN164Lecture 6-19C code to assembly translationtemp = y; while( temp > 0 ) { x = x + z; temp = temp - 1; } start: set y, %r1 ld [%r1], %r2 ! use %r2 for temp set z, %r1 ld [%r1], %r3 ! use %r3 for z mov %r0, %r4 ! use %r4 for x add %r2, 1, %r2 ! set up for decrement ba test ! test the loop condition top: add %r4, %r3, %r4 ! x + z Æ x test: subcc %r2, 1, %r2 ! temp - 1 Æ temp bg top ! temp > 0 ? set x, %r1 st %r4, [%r1] ! store x branch alwaysBranch if greater than 0Fragment in SPARC assemblyThrough which means is the condition tested here?EN164Lecture 6-20Specifying the Target Address• PC-Relative: Needs fewer bits to encode, independent of how/where the compiled code is linked, used for branches and jumps — typically, the displacement needs 4-8 bits• Register-indirect jumps: The address is not known at compile-time and has to be computed at run-time–procedure returns– case statements– function pointers– dynamically