U of U CS 5785 - Timing analysis (25 pages)

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Timing analysis



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Timing analysis

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Pages:
25
School:
University of Utah
Course:
Cs 5785 - Advanced Embedded Software

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Last Time Response time analysis Blocking terms Priority inversion And solutions Release jitter Other extensions Today Timing analysis Answers a question we commonly ask At most long can this code take to run Response time over CAN Worst case message times Holistic scheduling Timing Analysis Definitions Worst case execution time WCET Longest execution time of a program on a given platform considering all possible inputs Precise timing analysis problem Compute WCET Trivially reduces to halting problem Though not in practice But still too hard Timing analysis problem Compute a conservative estimate of the WCET I e estimate of WCET can be true WCET This is decidable Correct analyzer could always return Timing Analysis by Testing WCET is often estimated by looking for the maximum execution time over many executions Number of executions This is easy However it does not solve the problem True WCET Execution time Longest observed ET 1 Longest observed ET 2 WCET estimate Timing Analysis by Testing Always true Longest observed ET true WCET WCET estimate Question What is the requirement for correctly estimating WCET using testing Static Timing Analysis Static timing analysis Estimate WCET without running a program Problem 1 Can t do this from source code Solution Analyze compiler output Problem 2 Understanding what s going on in HW Which variables go into registers Which functions are inlined Which switches become jump tables vs cascaded tests Where are the branch mispredicts Where are the icache dcache misses Solution Build model of the hardware Static Timing Analysis int foo1 int a int b int c b 31 a int e 120 c a return e link move l moveq muls l sub l addi l unlk rts a6 0 8 a6 d0 32 d1 d1 d0 12 a6 d0 120 d0 a6 What does it take to estimate WCET of this code Analyzing Branches void foo2 int a if a x 3 a else y x a link move l tst l beq s moveq muls l add l bra s move l sub l move l sub l move l unlk rts a6 0 8 a6 d2 d2 16 3 d0 d0 d2 d2 x 24 x d1 d2 d1 y d0 d1 d0 d0 y a6



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