IBM Systems & Technology GroupCell/Quasar Ecosystem & Solutions EnablementCell Programming Workshop07/19/07© 2007 IBM Corporation1Developing Code for Cell - SIMDCell Programming WorkshopCell/Quasar Ecosystem Solutions EnablementIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/072Course Objectives Learn how to vectorize a scalar program to exploit the power of Cell BE How to use SPU intrinsicsIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/073Course Agenda Vector Programming (SIMD)– Data types for vector programming– Application partitioning SPU IntrinsicsTrademarks - Cell Broadband Engine ™ is a trademark of Sony Computer Entertainment, Inc.IBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/074Vector ProgrammingIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/075SIMD Architecture SIMD = “single-instruction multiple-data” SIMD exploits data-level parallelism– a single instruction can apply the same operation to multiple data elements in parallel SIMD units employ “vector registers”– each register holds multiple data elements SIMD is pervasive in the BE– PPE includes VMX (SIMD extensions to PPC architecture)– SPE is a native SIMD architecture (VMX-like) SIMD in VMX and SPE– 128bit-wide datapath– 128bit-wide registers– 4-wide fullwords, 8-wide halfwords, 16-wide bytes– SPE includes support for 2-wide doublewordsIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/076A SIMD Instruction Example Example is a 4-wide add– each of the 4 elements in reg VA is added to the corresponding element in reg VB– the 4 results are placed in the appropriate slots in reg VCA.0 A.1 A.2 A.3B.0 B.1 B.2 B.3+ + + +C.0 C.1 C.2 C.3Reg VAReg VBReg VCvector regs add VC,VA,VBIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/07716-byte boundaries16-byte boundariesIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/078SIMD “Cross-Element” Instructions VMX and SPE architectures include “cross-element” instructions– shifts and rotates– permutes / shuffles Permute / Shuffle– selects bytes from two source registers and places selected bytes in a target register– byte selection and placement controlled by a “control vector” in a third source register¾ extremely useful for reorganizing data in the vector register fileIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/079Shuffle / Permute – A Simple ExampleReg VAReg VBvector regsshuffle VT,VA,VB,VCA.0 A.1 A.2 A.3 A.4 A.5 A.6 A.7 A.8 A.9 A.a A.b A.c A.d A.e A.fB.0 B.1 B.2 B.3 B.4 B.5 B.6 B.7 B.8 B.9 B.a B.b B.c B.d B.e B.f01 14 18 10 06 15 19 1a 1c 1c 1c 13 08 1d 1b 0eA.1 B.4 B.8 B.0 A.6 B.5 B.9 B.a B.c B.c B.c B.3 A.8 B.d B.b A.eReg VTReg VC Bytes selected from regs VA and VB based on byte entries in control vector VC Control vector entries are indices of bytes in the 32-byte concatenation of VA and VB Operation is purely byte oriented¾ SPE has extended forms of the shuffle / permute operationIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/0710SIMD Programming “Native SIMD” programming– algorithm vectorized by the programmer– coding in high-level language (e.g. C, C++) using intrinsics– intrinsics provide access to SIMD assembler instructions • e.g. c = spu_add(a,b) Æ add vc,va,vb “Traditional” programming– algorithm coded “normally” in scalar form– compiler does auto-vectorization¾ but auto-vectorization capabilities remain limitedIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/0711C/C++ Extensions to Support SIMD Vector datatypes– vector [unsigned] {char, short, float, double}• e.g. “vector float”, “vector signed short”, “vector unsigned int”, …– SIMD width per datatype is implicit in vector datatype definition– casts from one vector type to another in the usual way– vectors aligned on quadword (16B) boundaries Vector pointers– e.g. “vector float *p”– p+1 points to the next vector (16B) after that pointed to by p– casts between scalar and vector pointer typesIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/0712Generic SPU Intrinsics Generic / Buit-In– Constant formation (spu_splats)– Conversion (spu_convtf, spu_convts, ..)– Arithmetic (spu_add, spu_madd, spu_nmadd, ...)– Byte operations (spu_absd, spu_avg,...)– Compare and branch (spu_cmpeq, spu_cmpgt,...)– Bits and masks (spu_shuffle, spu_sel,...)– Logical (spu_and, spu_or, ...)– Shift and rotate (spu_rlqwbyte, spu_rlqw,...)– Control (spu_stop, spu_ienable, spu_idisable, ...)– Channel Control (spu_readch, spu_writech,...)– Scalar (spu_insert, spu_extract, spu_promote) Composite– DMA (spu_mfcdma32, spu_mfcdma64, spu_mfcstat)IBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/0713Fitting SIMD Data Types into RegistersIBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM CorporationCell Programming Workshop07/19/0714Accessing SIMD instructions Access to SIMD instructions is via intrinsic functions– similar intrinsics for both SPU and VMX– translation from function to instruction dependent on datatype of arguments– e.g. spu_add(a,b) can translate to a floating add, a signed or unsigned intadd, a signed or unsigned short add, etc.– Examples• t_v = spu_mul(t_v, (vector float)spu_splats((float)0.5));• t_v = spu_sub( (vector float) spu_splats( (float)47.11), t_v);• t_v = spu_mul( t_v, s_v);IBM Systems & Technology Group – Cell/Quasar Ecosystem & Solutions Enablement© 2007 IBM
View Full Document
Unlocking...