ECE3050 Summer 2005Design ProjectThe figure shows the circuit diagram of an operational amplifier. The object of this assignment is tocalculate the circuit elements and perform a SPICE simulation. You must write the netlist or SPICEdeck for the assignment . You are not permitted to use a schematic editor to generate the netlist.To do this, you use an ascii text editor. Such an editor is part of both PSpice, Notepad, or Wordpad.Thefirst line of the netlist must be a title line. You can title it ECE 3050 DESIGN PR OJECT.A suggested name for the ascii n etlist file is opamp.cir. Comment lines must be preceded by anasterisk. Continuation lines must be preceded by a plus sign followe d by a space. Write the netlistusing all capital letters.For the JFET and BJTs in the circuit, you are to use the following SPICE MODEL statements:J1.MODEL MNJF1 NJF BETA=5E-4 VTO=-3 LAMBDA=0.0125Q1, Q2, Q5− Q7.MODEL MNPN1 NPN IS=1.26E-14 BF=149 VA=150Q3, Q4, Q8.MODEL MPNP1 PNP IS=1.26E-14 BF=149 VA=150where BF for the BJT is its β. The other parameters should be self explanatory. In your calculationsfor the resistors, you can neglect the Early effect, i.e. set VA= ∞ and λ =0. In addition, with theexception of Q5and Q6, neglect all BJT base currents, i.e. set IB=0.First, label the node numbers for each node in the circuit. The ground node must be labeled 0.Voltage sources are of the form VX N1 N2 AC ACVAL DC DCVAL,whereVX isthesourcename,N1is the positive node, N2 is the negative node, ACVAL is the ac phasor value, and DCVA is the dcvalue. Current sources are of the form IX N1 N2 AC ACVAL DC DCVAL. The arrow in the currentsource symbol points from the N1 node to the N2 node. Resistors and capacitors are specified asRX N1 N2 VALUE and CX N1 N2 VALUE. BJTs are specified as QX NC NB NE QMDL,whereQX is theBJT name, NC, NB,andNE, respectively, are the collector, base, and emitter nodes, and QMDL is themodel name. JFETs are specified as JX ND NG NS JMDL,whereJX is the JFET name, ND, NG,andNS, respectively, are the drain, gate, and source nodes, and JMDL is the model name.The first step in any design is to specify the dc bias values. These are specified to be V+=18V,V−= −18 V, VO=0V, ID1=1.5mA, IC3=0.5mA, IC4=1.5mA, IC6=2mA,andIE7= IE8=2mA. The small-signal ac gain with feedback can be approximated by the equationvovi=1+RF 2RF 1This is the familiar gain formula for the non-inverting op-amp amplifier. The gain is specified toha ve a value of 10 (20 dB). The value of RF 2is to be 10 kΩ.ThevalueofCFis to be calculatedso that 1/ (2πRF 1CF)=10Hz.ThevalueofRLis specified to be RL=1kΩ.Thevalueofboth R1Aand R1Bare specified to be equal to RF 2.ThevalueofC1is to be calculated so that1/ (2πR1BC1)=10Hz.ThevaluesofRE7and RE8are to be 10 Ω.The circuit is to be designed for the gain-bandwidth product fx=1MHzand the slew rate SR =10 V/µs. The approximate design equations which set these parameters arefx=14π (re+ RE) CcSR =ID12Ccwhere re=2VT/ID1. You can use these equations to solve for the values of REand Cc. The defaultvalue of VTin SPICE is 25.86 mV. This value should be used in the calculations.1The voltage across RE6is specified to be 0.5VBE6,whereVBE6is the base-emitter voltage. You canuse the transistor collector current equation to calculate VBE6. To calculate RC1,usethetransistorcollector current equation to calculate VEB3and VEB4. Then neglect the base curren ts in Q3andQ4to calculate RC1=(VEB3+ VEB4) /IC1. The current through R5is specified to be 20IB6.Thevoltage across RE6is specified to be equal to VBE6. If the base currents in Q7and Q8are neglected,the current through the VBEmultiplier is equal to IC6.TheVBEmultiplier is to be designed sothat IE5=0.9IC6and the current through R3is 0.1IC6.SPICE Analyses:1. Perform a dot-OP analysis. Examine the dot-OUT file. Verify that all dc bias currents andvoltages are equal to or close to the desired values. Do not proceed until the bias values arecorrect. They do not have to be exact, but you should be able to come within 5% to 10% ofthe specified values. You will findthebiascurrentsinQ7and Q8are extremely sensitive tothe voltage across the VBEmultiplier. You may have to experimentally “tweak” the value ofeither R2or R3to obtain the desired current.2. Perform a dot-AC analysis using AC 1 for Vi. Plot the amplifier gain versus frequency usinglog scales for both the vertical and horizontal axes. Do not use linear scales! Verify thatthe mid-frequency gain is approximately 10, the gain at 10 Hz is approximately 5,andthehigh-frequency gain passes through unity at approximately f = fx. Do not proceed with thefollowing steps until you meet these specifications.3. Determine the upper frequency at which the gain is 10/√2. Verify that this frequency mul-tiplied by the mid-frequency gain of 10 is equal to fx.4. Plot the open-loop gain as a function of frequency by plotting Vo/ (Vb1− Vb2).5. Perform a dot-TRAN analysis using a voltage step at the input of value 1V. Plot the outputvoltage as a function of time and evaluate the maximum slope. This should be equal to thepositive slew rate. With 1V input, the output should rise to 10 V.6. Perform a dot-TRAN analysis using a voltage step at the input of value −1V. Plot the outputvoltage as a function of time and evaluate the maximum slope. This should be equal to thenegative slew rate. With −1V input, the output should fall to −10 V.7. Perform a dot-TRAN analysis using a sine wave at the input with a frequency of 1kHz.Increase the amplitude of the sine wave until the op amp is driven just to the clipping level.Is the clipping symmetrical? Obtain a plot of the output voltage.8. Set Vi=0,replaceRLwith a 1A ac current source. Perform a dot-AC analysis and plot Voas a function of frequency using log-log scales. This plot is a plot of the small-signal outputimpedance of the op amp.In your write-up, include calculations, a copy of the circuit diagram with all SPICE nodes numbered,and a copy of the netlist. Include a copy of the dot-OUT file showing all dc bias currents andvoltages. Include all frequency response plots and all transient response plots. Title all plotsand label pertinent values on the plots, e.g. mid-band gain, lower cutoff frequency, upper cutofffrequency, gain-bandwidth product, slew rates,