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14-Pin FLASH-Based 8-Bit CMOS Microcontroller1.0 Device OverviewFIGURE 1-1: PIC16F630/676 block diagramTABLE 1-1: PIC16F630/676 Pinout Description2.0 Memory Organization2.1 Program Memory OrganizationFIGURE 2-1: Program Memory Map and Stack for the PIC16F630/6762.2 Data Memory OrganizationFIGURE 2-2: Data Memory Map of the PIC16F630/676TABLE 2-1: PIC16F630/676 Special Registers Summary Bank 0TABLE 2-2: PIC16F630/676 Special Function Registers Summary Bank 12.3 PCL and PCLATHFIGURE 2-3: Loading Of PC In Different Situations2.4 Indirect Addressing, INDF and FSR RegistersFIGURE 2-4: Direct/Indirect Addressing PIC16F630/6763.0 Ports A and C3.1 PORTA and the TRISA Registers3.2 Additional Pin FunctionsFIGURE 3-1: Block Diagram of RA0 and RA1 PinsFIGURE 3-2: Block Diagram of RA2FIGURE 3-3: Block Diagram of RA3FIGURE 3-4: Block Diagram of RA4FIGURE 3-5: Block Diagram of RA5TABLE 3-1: Summary of Registers Associated with PORTA3.3 PORTCFIGURE 3-6: BLOCK DIAGRAM OF RC0/RC1/RC2/RC3 PINsFIGURE 3-7: BLOCK DIAGRAM OF RC4 AND RC5 PINSTABLE 3-2: Summary of Registers Associated with PORTC4.0 Timer0 Module4.1 Timer0 Operation4.2 Timer0 InterruptFIGURE 4-1: Block Diagram of thE Timer0/WDT Prescaler4.3 Using Timer0 with an External Clock4.4 PrescalerTABLE 4-1: Registers Associated with Timer05.0 Timer1 Module with Gate ControlFIGURE 5-1: TIMER1 BLOCK DIAGRAM5.1 Timer1 Modes of Operation5.2 Timer1 Interrupt5.3 Timer1 PrescalerFIGURE 5-2: TIMER1 INCREMENTING EDGE5.4 Timer1 Operation in Asynchronous Counter Mode5.5 Timer1 Oscillator5.6 Timer1 Operation During SLEEPTABLE 5-1: Registers Associated with Timer1 as a Timer/Counter6.0 Comparator Module6.1 Comparator OperationTABLE 6-1: Output state vs. input conditionsFIGURE 6-1: Single Comparator6.2 Comparator ConfigurationFIGURE 6-2: Comparator I/O operating Modes6.3 Analog Input Connection ConsiderationsFIGURE 6-3: Analog Input Mode6.4 Comparator OutputFIGURE 6-4: Modified Comparator Output Block Diagram6.5 Comparator ReferenceFIGURE 6-5: Comparator VOLTAGE REFERENCE BLOCK DIAGRAM6.6 Comparator Response Time6.7 Operation During SLEEP6.8 Effects of a RESET6.9 Comparator InterruptsTABLE 6-2: Registers Associated with Comparator Module7.0 Analog-to-Digital Converter (A/D) Module (PIC16F676 only)FIGURE 7-1: A/D Block Diagram7.1 A/D Configuration and OperationTABLE 7-1: Tad VS. DEVICE OPERATING FREQUENCIESFIGURE 7-2: 10-Bit A/D Result Format7.2 A/D Acquisition RequirementsFIGURE 7-3: Analog Input Model7.3 A/D Operation During SLEEP7.4 Effects of RESETTABLE 7-2: Summary of A/D Registers8.0 Data EEPROM Memory8.1 EEADR8.2 EECON1 AND EECON2 REGISTERS8.3 READING THE EEPROM DATA MEMORY8.4 WRITING TO THE EEPROM DATA MEMORY8.5 WRITE VERIFY8.6 PROTECTION AGAINST SPURIOUS WRITE8.7 DATA EEPROM OPERATION DURING CODE PROTECTTABLE 8-1: Registers/Bits Associated with Data EEPROM9.0 Special Features of the CPU9.1 Configuration Bits9.2 Oscillator ConfigurationsFIGURE 9-1: Crystal Operation (or Ceramic Resonator) (HS, XT or LP Osc Configuration)FIGURE 9-2: External Clock Input Operation (HS, XT, EC, or LP Osc Configuration)TABLE 9-1: Capacitor Selection for Ceramic ResonatorsTABLE 9-2: Capacitor Selection for Crystal OscillatorFIGURE 9-3: RC OSCILLATOR MODE9.3 RESETFIGURE 9-4: Simplified Block Diagram of On-chip Reset CircuitFIGURE 9-5: Recommended MCLR CircuitFIGURE 9-6: Brown-out SituationsTABLE 9-3: Time-out in Various SituationsTABLE 9-4: Status/PCON Bits and Their SignificanceTABLE 9-5: Summary of Registers Associated with Brown-outTABLE 9-6: Initialization Condition for Special RegistersTABLE 9-7: Initialization Condition for RegistersFIGURE 9-7: Time-out Sequence on Power-up (MCLR not tied to Vdd): Case 1FIGURE 9-8: Time-out Sequence on Power-up (MCLR not tied to Vdd): Case 2FIGURE 9-9: Time-out Sequence on Power-up (MCLR tied to Vdd)9.4 InterruptsFIGURE 9-10: INTERRUPT LOGICFIGURE 9-11: INT Pin Interrupt TimingTABLE 9-8: Summary of interrupt registers9.5 Context Saving During Interrupts9.6 Watchdog Timer (WDT)FIGURE 9-12: Watchdog Timer Block DiagramTABLE 9-9: Summary of Watchdog Timer Registers9.7 Power-Down Mode (SLEEP)FIGURE 9-13: Wake-up from Sleep Through Interrupt9.8 Code Protection9.9 ID Locations9.10 In-Circuit Serial ProgrammingFIGURE 9-14: Typical In-Circuit Serial Programming Connection9.11 In-Circuit DebuggerTABLE 9-10: Debugger resources10.0 Instruction Set Summary10.1 READMODIFY-WRITE OPERATIONSTABLE 10-1: Opcode Field DescriptionsFIGURE 10-1: General Format for InstructionsTABLE 10-2: PIC16F630/676 Instruction Set10.2 Instruction Descriptions11.0 Development Support11.1 MPLAB Integrated Development Environment Software11.2 MPASM Assembler11.3 MPLAB C17 and MPLAB C18 C Compilers11.4 MPLINK Object Linker/ MPLIB Object Librarian11.5 MPLAB C30 C Compiler11.6 MPLAB ASM30 Assembler, Linker, and Librarian11.7 MPLAB SIM Software Simulator11.8 MPLAB SIM30 Software Simulator11.9 MPLAB ICE 2000 High Performance Universal In-Circuit Emulator11.10 MPLAB ICE 4000 High Performance Universal In-Circuit Emulator11.11 MPLAB ICD 2 In-Circuit Debugger11.12 PRO MATE II Universal Device Programmer11.13 PICSTART Plus Development Programmer11.14 PICDEM 1 PICmicro Demonstration Board11.15 PICDEM.net Internet/Ethernet Demonstration Board11.16 PICDEM 2 Plus Demonstration Board11.17 PICDEM 3 PIC16C92X Demonstration Board11.18 PICDEM 17 Demonstration Board11.19 PICDEM 18R PIC18C601/801 Demonstration Board11.20 PICDEM LIN PIC16C43X Demonstration Board11.21 PICkitTM 1 FLASH Starter Kit11.22 PICDEM USB PIC16C7X5 Demonstration Board11.23 Evaluation and Programming Tools12.0 Electrical SpecificationsFIGURE 12-1: PIC16F630/676 With A/D Disabled Voltage-Frequency Graph, -40˚C £ ta £ +125˚CFIGURE 12-2: PIC16F676 With A/D Enabled Voltage-Frequency Graph, -40˚C £ ta £ +125˚CFIGURE 12-3: PIC16F676 With A/D Enabled Voltage-Frequency Graph, 0˚C £ ta £ +125˚C12.1 DC Characteristics: PIC16F630/676-I (Industrial), PIC16F630/676-E (Extended)12.2 DC Characteristics: PIC16F630/676-I (Industrial)12.3 DC Characteristics: PIC16F630/676-I (Industrial)12.4 DC Characteristics: PIC16F630/676-E (Extended)12.5 DC Characteristics: PIC16F630/676-E (Extended)12.6 DC Characteristics: PIC16F630/676-I (Industrial), PIC16F630/676-E (Extended)12.7 DC Characteristics: PIC16F630/676-I (Industrial), PIC16F630/676-E (Extended) (Cont.)12.8 Timing Parameter SymbologyFIGURE 12-4: LOAD CONDITIONS12.9 AC Characteristics: PIC16F630/676 (Industrial, Extended)FIGURE 12-5: External Clock TimingTABLE 12-1: External


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CU-Boulder PHYS 3330 - Data Sheet

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