Difference Amplifier/Common Mode Rejection Ratio Brad Peirson 4-7-2005 EGR 214 – Circuit Analysis I Laboratory Section 04 Prof. BlauchAbstract The purpose of this laboratory is to determine the Common Mode Rejection Ratio (CMRR) for a difference amplifier circuit. A difference amplifier is a circuit that will amplify the difference between two input voltages. A circuit schematic was given, and from this schematic the relationship between the input voltages and the output voltages was determined. The circuit was then drawn in P-Spice and simulated. This same circuit was then built using a u741 operational amplifier chip. The CMRR was determined algebraically, from the P-Spice model and from the results of measurements using a digital multi-meter. The simulated and experimental results were then compared against the CMRR from the mathematical model. While not ideal, the simulated and experimental common mode rejection ratios were extremely close to the mathematically predicted CMRR. Because of this the circuit will likely not show any variation in output due to electrical interference. 1.0 Introduction The difference amplifier is a circuit that requires two separate input voltages. The purpose of the circuit is to amplify the difference between two input voltages. The circuit also has the capability to effectively ignore the inputs when they are the same. This function is vital as all electronic circuits are exposed to interference. Often such interference will result in the input signals having the same voltage value. An ideal difference amplifier will reject all such interference and amplify only the difference between the two inputs. The key to the difference amplifier is an operational amplifier. Since its inception nearly sixty years ago the operational amplifier has been a key component in computer systems. The internal circuitry in the modern operational amplifier is a complex circuit consisting of resistors, capacitors and inductors. This complex circuit can be considered a black box, which greatly simplifies the analysis of any operational amplifier circuit. Section 2 outlines the operation of the operational amplifier and the difference amplifier circuit. It also details several properties of the difference amplifier circuit. Section 3 is the analysis of the difference amplifier circuit using assigned nominal resistance values. This section also contains the derivations of the inherent relationships - 1 -of the difference amplifier. Section 4 contains a P-Spice simulation of the difference amplifier circuit. Section 5 analyzes the data gathered from the physical circuit. Section 6 is the results discussion section and section 7 is the conclusions section. 2.0 The Operational Amplifier The Operational Amplifier (OP AMP) is a complex integrated circuit. OP AMPS are amplifying circuits that were originally designed to perform mathematical operations. Early OP AMP consisted of vacuum tubes in early analog computers. As technology evolved, so too did the OP AMP. The most common OP AMP configuration in use today is the 741 integrated circuit chip. Figure 1 shows the 741 chip pin diagram with an OP AMP schematic diagram. vN +VCCvP vO-VCC Figure 1: u741 OP AMP Pin Diagram The OP AMP itself is a five pin device. It is also an active device that depends on present inputs as well as previous inputs to operate. This means that the device requires a voltage to drive it. This voltage is +VCC and –VCC, the same voltage with the polarities reversed. These voltages are shown on the pin diagram in Figure 1. Pins 4 and 7 are typically left off of schematic diagrams for the sake of clarity, though the voltages are assumed to be present. The output voltage of the OP AMP cannot exist outside the ±VCC range. When the output voltage would be less than –VCC, the output stays at –VCC. This is known as the –Saturation region. Likewise, the output voltage remains at +VCC when it would be greater. This is known as the +Saturation regions. Between the saturation regions the OP AMP is in the linear operation region. The output voltage of the OP AMP in the linear region is determined by - 2 -()NPOvvAv−=. (1) The relationship of the three regions is shown in Figure 2. Figure 2: OP AMP Characteristics The slope of the graph in the linear region is the voltage gain, A, from (1). The range of vO can be used to determine the two main characteristics of an ideal OP AMP. The relationship of vO to ±VCC is CCOCCVvV+≤≤−. (2) When (1) is substituted into (2) the relationship between vP, vN and ±VCC is found to be ()AVvvAVCCNPCC+≤−≤−. (3) The voltage gain is typically very high in an OP AMP, usually on the order of 105. In an ideal OP AMP the gain is assumed to be infinite. When this is the case, the relationship in (3) becomes ()00≤−≤NPvv . (4) This shows the first characteristic of an ideal OP AMP. The second characteristic of the ideal OP AMP has to do with currents. The resistance across the two input terminals on an ideal OP AMP is assumed to be infinite. By Ohm’s law this means that the current entering both input nodes must be zero. So, the characteristics of an ideal OP AMP are - 3 -NPvv= (5) and 0==NPii . (6) 2.1 Difference Amplifier The difference amplifier is a specific application of the OP AMP. This circuit amplifies the difference between two separate input voltages and ignores common inputs. The schematic for this type of circuit is shown in Figure 3. 1R2R3R4R1v2v _ + + v_ 0 Figure 3: Difference Amplifier Circuit The relationship of the inputs to the outputs of the difference amplifier can best be described if two new voltages are defined. The differential mode voltage and the common mode voltage (v)(dmvcm) are defined as 12vvvdm−= (7) and 221vvvcm+=. (8) These new voltages relate to the output voltages linearly. The new relationship is shown in (9). dmdmcmcmOvAvAv+= (9) - 4 -When the two input voltages are the same, they drive the differential mode term to zero. This means that the common mode voltage only shows up in the equation when the two inputs are the same voltage with the same polarity. In order to ensure that this voltage is rejected the common mode gain must be zero. When this happens it can be shown that dmcmOvRRvv120 +=. (10) This relationship shows that any common mode voltage will be disregarded. Likewise