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WVU EE 551 - Syllabus

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West Virginia University College of Engineering and Mineral Resources Lane Department of Computer Science and Electrical Engineering EE 551 – Linear Integrated Circuits Spring 2014 Class Info Instructor Meeting Time: 9:30-10:45 TR Dr. David W. Graham Location: 215 ESB [email protected] Prerequisites: EE 355, EE 356, and EE 450 945 ESB Credit Hours: 3 (Lecture) 304-293-9692 Office Hours 10:45-11:45 TR, or by appointment Text Required Analysis and Design of Analog Integrated Circuits, 5th Edition By Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer John Wiley & Sons, Inc., New York, 2001 ISBN: 0470245999 Recommended Analysis and Design of Elementary MOS Amplifier Stages By Boris Murmann NTS Press, 2013 ISBN: 9781934891179 Webpage www.csee.wvu.edu/~dwgraham/classes/ee551 Contains a detailed schedule of course coverage, reading assignments, homework, and projects. Course Description Design and analysis of analog integrated circuits. Both linear and nonlinear transistor models are covered. Applications focus on linear analog circuits including simple amplifiers, operational amplifiers, and reference circuits. This course focuses on CMOS technology. Course Objectives The purpose of this course is to equip the student with the fundamental concepts of analog circuit design specifically geared towards integrated-circuit technology. Analog circuit design will focus primarily on CMOS technology, covering the topics of transistor modeling, simple amplifiers, operational amplifiers, and reference circuits. At the completion of the course, you should be able to analyze and design linear analog integrated circuits. Specifically, you should be able to use theory along with SPICE and layout tools to completely design complex amplifiers and their supporting circuitry. Expected Learning Outcomes 1. Ability to understand the origins and uses of different transistor models, as well as their differences and limitations. 2. Ability to analyze and design analog circuits in CMOS technology. 3. Ability to design the physical layout of analog integrated circuits. 4. Ability to use standard analog circuit computer-aided design (CAD) tools to design analog integrated circuits. Examples include SPICE and layout editors.Attendance Students are responsible for all material covered in class and any announcements made during class time (including changes to test dates, etc.). Please arrive at class on time. Class Policies The use of portable phones in the classroom is not permitted (i.e. no calls, no texting, no ringers, etc.). Please remember to turn off your ringers before class. If there are extenuating circumstances that warrant the need of a cell phone in class, let me know beforehand. Assessment Tests (2) 35% February 20, April 8 * Test dates are tentative Projects 35% Final 30% 11:00-1:00 May 2 (In class and take home) Extra Credit 5% Grading A ≥ 90% 90 > B ≥ 80% 80 > C ≥ 70% 70 > D ≥ 60% F < 60% Homework Regular homework assignments will be given to help provide understanding of the material and also practice solving problems. Solutions for the homework problems will typically be provided at the time the problems are assigned. These problems should be completed, but they do not need to be turned in. Tests Two 75-minute tests will be given in class. For each test and also the written portion of the Final, you will be permitted to bring a calculator and an equations sheet consisting of one 8.5x11 inch piece of paper with handwritten notes, front and back. You will be able to bring in previous equations sheets to subsequent tests (e.g. for the Final, you will be able to bring in one new equation sheet plus the equations sheets from the previous two tests). Please take special care of these equations sheets since you will not be permitted to remake them for any reason. The limitations on these equations sheets are that they must be handwritten, and they cannot contain completely worked out problems (equations and formulas only). Additionally, you may not add to them once the test is over. If there are infractions on any of these restrictions, I reserve the right to deduct points from your test, accordingly. Projects Projects will be assigned on an approximately weekly or biweekly basis. These projects will primarily cover data analysis and circuit design. They will, accordingly, make use of software packages such as MATLAB, SPICE, and circuit layout tools (e.g. Cadence). Not all projects will be of equal value. Project reports are due at the BEGINNING of class. Late project reports will be deducted by 10 points each twenty-four-hour period after the time in which it is due. Projects turned in after an associated project presentation will be subject to an additional 20 point deduction. Additionally, your reports must be turned in electronically via e-mail as well as in paper form. Paper reports must be stapled. I reserve the right to deduct points if you fail to staple your report. Detailed directions about the project reports will be provided on the class website. You are to work with a partner on these projects unless otherwise specified, and you will turn in a combined report with your partner (you will both receive the same grade). You are not permitted to communicate with other groups as you work on these projects. Final The Final Exam for the course will consist of two parts – (1) a written, cumulative test and (2) a take-home comprehensive design. The written portion of the Final will take place in the regularly scheduled exam period. Since the design portion will require using CAD tools, it will be a “take-home” part of the Final. Extra Credit There will be several extra-credit opportunities throughout the course of the semester. These may consist of pop quizzes, on-line quizzes, project presentations, out of class assignments, etc. These extracredit opportunities are designed to make sure you are keeping up with the material and are closely paying attention in class. Since quizzes will normally be unannounced, please make


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