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GSU CSC 2010 - Combinational Circuits part2

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OutlineDecoderThe truth table of 2-to-4 Decoder2-to-4 DecoderSlide 5The truth table of 3-to-8 Decoder3-to-8 Decoder3-to-8 Decoder with EnableDecoder ExpansionSlide 10Combining two 2-4 decoders to form one 3-8 decoder using enable switchHow about 4-16 decoderSlide 13EncodersSlide 15Encoders with OR gatesSlide 17Priority EncoderSlide 19Slide 20Slide 21Multiplexer (MUX)Slide 23Slide 24Slide 25Multiplexers versus decodersMultiplexer Versus DecoderSlide 28Slide 29Slide 30Slide 31Quadruple 2-to-1 Line MultiplexerOutlineDecoderEncoder MuxDecoderAccepts a value and decodes itOutput corresponds to value of n inputsConsists of:Inputs (n)Outputs (2n , numbered from 0  2n - 1)Selectors / Enable (active high or active low)The truth table of 2-to-4 Decoder2-to-4 Decoder2-to-4 DecoderThe truth table of 3-to-8 DecoderA2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D70 0 0 10 0 1 10 1 0 10 1 1 11 0 0 11 0 1 11 1 0 11 1 1 13-to-8 Decoder3-to-8 Decoder with EnableDecoder ExpansionDecoder expansionCombine two or more small decoders with enable inputs to form a larger decoder3-to-8-line decoder constructed from two 2-to-4-line decodersThe MSB is connected to the enable inputsif A2=0, upper is enabled; if A2=1, lower is enabled.Decoder ExpansionCombining two 2-4 decoders to form one 3-8 decoder using enable switchThe highest bit is used for the enablesHow about 4-16 decoderUse how many 3-8 decoder?Use how many 2-4 decoder?OutlineDecoderEncoder MuxEncodersPerform the inverse operation of a decoder2n (or less) input lines and n output linesEncodersEncoders with OR gatesEncodersPerform the inverse operation of a decoder2n (or less) input lines and n output linesAccepts multiple values and encodes themWorks when more than one input is activeConsists of:Inputs (2n)Outputs when more than one output is active, sets output to correspond to highest inputV (indicates whether any of the inputs are active)Selectors / Enable (active high or active low)Priority EncoderD3 D2 D1 D0 A1 A2 V0 0 0 0 x X 00 0 0 1 0 0 10 0 1 0 0 1 10 0 1 1 0 1 10 1 0 0 1 0 10 1 0 1 1 0 10 1 1 0 1 0 10 1 1 1 1 0 11 0 0 0 1 1 11 0 0 1 1 1 11 0 1 0 1 1 11 0 1 1 1 1 11 1 0 0 1 1 11 1 0 1 1 1 11 1 1 0 1 1 11 1 1 1 1 1 1Priority EncoderOutlineDecoderEncoder MuxMultiplexer (MUX)A selector chooses a single data input and passes it to the MUX outputIt has one output selected at a time.A multiplexer can use addressing bits to select one of several input bits to be the output.4 to 1 line multiplexer S1S0F0 0 I00 1 I11 0 I21 1 I34 to 1 line multiplexer2n MUX to 1n for this MUX is 2This means 2 selection lines s0 and s1Multiplexer (MUX)Consists of:Inputs (multiple) = 2nOutput (single)Selectors (# depends on # of inputs) = nEnable (active high or active low)Function table with enableMultiplexers versus decoders• A Multiplexer uses n binary select bits to choose from a maximum of 2n unique input lines.•Multiplexers and decoders both can decode minterms.•Decoders have n number of output lines while multiplexers have only one output line.•The decoded minterms are used to select data from one of up to 2n unique data input lines. •The output of the multiplexer is the data input whose index is specified by the n bit code.Multiplexer Versus DecoderS0S1I3I2I1I0XNote that the multiplexer has an extra OR gate. A1 and A0 are the two inputs in decoder. There are four inputs plus two selecs in multiplexer. 4-to-1 Multiplexer 2-t0-4 DecoderCascading multiplexers Using three 2-1 MUX to make one 4-1 MUXS1S0F0 0 I00 1 I11 0 I21 1 I3FF2-1 MUX S ES2 ES2S1S0F0 0 0 I00 0 1 I10 1 0 I20 1 1 I31 0 0 I41 0 1 I51 1 0 I61 1 1 I7I0I1I2I3I4I5I6I7Example: Construct an 8-to-1 multiplexer using 2-to-1 multiplexers.Example ( ) Construct 8-to-1 multiplexer using one 2-to-1 multiplexer and two 4-to-1 multiplexersS2S1S0XQuadruple 2-to-1 Line MultiplexerUsed to supply four bits to the output. In this case two inputs four bits each.Quadruple 2-to-1 Line MultiplexerE(Enable)S(Select)Y(Output)0 X All 0’s1 0 A1 1


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