PIC24 Family Instruction Set Summary page 1 Copyright Delmar Cengage Learning 2009. All Rights Reserved From Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family” Instr Descr #W #Cyc Status Machine Code ADD{.B} f f = f + WREG 1 1 C,DC,N,V,Z 1011 0100 0BDf ffff ffff ffff ADD{.B} f,WREG WREG = f + WREG 1 1 C,DC,N,V,Z 1011 0100 0BDf ffff ffff ffff ADD{.B} #lit10,Wn Wn = lit10 + Wn 1 1 C,DC,N,V,Z 1011 0000 0Bkk kkkk kkkk dddd ADD{.B} Wb,Ws,Wd Wd = Wb + Ws 1 1 C,DC,N,V,Z 0100 0www wBqq qddd dppp ssss ADD{.B} Wb,#lit5,Wd Wd = Wb + lit5 1 1 C,DC,N,V,Z 0100 0www wBqq qddd d11k kkkk ADDC{.B} f f = f + WREG +(C)1 1 C,DC,N,V,Z 1011 0100 1BDf ffff ffff ffff ADDC{.B} f,WREG WREG = f + WREG +(C)1 1 C,DC,N,V,Z 1011 0100 1BDf ffff ffff ffff ADDC{.B} #lit10,Wn Wn = lit10 + Wn + (C)1 1 C,DC,N,V,Z 1011 0000 1Bkk kkkk kkkk dddd ADDC{.B} Wb,Ws,Wd Wd = Wb + Ws + (C)1 1 C,DC,N,V,Z 0100 1www wBqq qddd dppp ssss ADDC{.B} Wb,#lit5,Wd Wd = Wb + lit5 + (C)1 1 C,DC,N,V,Z 0100 1www wBqq qddd d11k kkkk AND{.B} f f = f & WREG 1 1 N,Z 1011 0110 0BDf ffff ffff ffff AND{.B} f,WREG WREG = f & WREG 1 1 N,Z 1011 0110 0BDf ffff ffff ffff AND{.B} #lit10,Wn Wn = lit10 & Wn 1 1 N,Z 1011 0010 0Bkk kkkk kkkk dddd AND{.B} Wb,Ws,Wd Wd = Wb & Ws 1 1 N,Z 0110 0www wBqq qddd dppp ssss AND{.B} Wb,#lit5,Wd Wd = Wb & lit5 1 1 N,Z 0110 0www wBqq qddd d11k kkkk ASR{.B} f f = arith. >> f (LSb into C) 1 1 N,Z,C=LSb 1101 0101 1BDf ffff ffff ffff ASR{.B} f,WREG WREG = arith. >> f (LSb into C) 1 1 N,Z,C=LSb 1101 0101 1BDf ffff ffff ffff ASR{.B} Ws,Wd Wd = arith. >> Ws (LSb into C) 1 1 N,Z,C=LSb 1101 0001 1Bqq qddd dppp ssss ASR Wb,Wns,Wnd Wnd = arith >> Wb by Wns (no C) 1 1 N,Z 1101 1110 1www wddd d000 ssss ASR Wb,#lit4,Wnd Wnd = arith >> Wb by lit4 (no C) 1 1 N,Z 1101 1110 1www wddd d100 kkkk BCLR{.B} f,#bit4 Bit Clear f 1 1 none 1010 1001 bbbf ffff ffff fffb BCLR{.B} Ws,#bit4 Bit Clear Ws 1 1 none 1010 0001 bbbb 0B00 0ppp ssss BRA C,Expr Branch if Carry 1 1 (2) none 0011 0001 nnnn nnnn nnnn nnnn BRA GE,Expr Branch if signed ≥ 1 1 (2) none 0011 1101 nnnn nnnn nnnn nnnn BRA GEU,Expr Branch if unsigned ≥ 1 1 (2) none 0011 0001 nnnn nnnn nnnn nnnn BRA GT,Expr Branch if signed > 1 1 (2) none 0011 1100 nnnn nnnn nnnn nnnn BRA GTU,Expr Branch if unsigned > 1 1 (2) none 0011 1110 nnnn nnnn nnnn nnnnPIC24 Family Instruction Set Summary page 2 Copyright Delmar Cengage Learning 2009. All Rights Reserved From Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family” Instr Descr #W #Cyc Status Machine Code BRA LE,Expr Branch if signed ≤ 1 1 (2) none 0011 0100 nnnn nnnn nnnn nnnn BRA LEU,Expr Branch if unsigned ≤ 1 1 (2) None 0011 0110 nnnn nnnn nnnn nnnn BRA LT,Expr Branch if signed < 1 1 (2) none 0011 0101 nnnn nnnn nnnn nnnn BRA LTU,Expr Branch if unsigned < 1 1 (2) none 0011 1001 nnnn nnnn nnnn nnnn BRA N,Expr Branch if Negative 1 1 (2) none 0011 0011 nnnn nnnn nnnn nnnn BRA NC,Expr Branch if Not Carry 1 1 (2) none 0011 1001 nnnn nnnn nnnn nnnn BRA NN,Expr Branch if Not Negative 1 1 (2) none 0011 1011 nnnn nnnn nnnn nnnn BRA NOV,Expr Branch if Not Overflow1 1 (2) none 0011 1000 nnnn nnnn nnnn nnnn BRA NZ,Expr Branch if Not Zero1 1 (2) none 0011 1010 nnnn nnnn nnnn nnnn BRA OV,Expr Branch if Overflow1 1 (2) none 0011 0000 nnnn nnnn nnnn nnnn BRA Expr Branch Unconditionally1 2 none 0011 0111 nnnn nnnn nnnn nnnn BRA Z,Expr Branch if Zero1 1 (2) none 0011 0010 nnnn nnnn nnnn nnnn BRA Wn Computed Branch1 2 none 0000 0001 0110 0000 0000 ssss BSET{.B} f,#bit4 Bit Set f1 1 none 1010 1000 bbbf ffff ffff fffb BSET{.B} Ws,#bit4 Bit Set Ws 1 1 none 1010 0000 bbbb 0B00 0ppp ssss BSW.C Ws,Wb Write C bit Ws<Wb> 1 1 none 1010 1101 0www w000 0ppp ssss BSW.Z Ws,Wb Write Z bit Ws<Wb> 1 1 none 1010 1101 1www w000 0ppp ssss BTG{.B} f,#bit4 Bit Toggle f 1 1 none 1010 1010 bbbf ffff ffff fffb BTG{.B} Ws,#bit4 Bit Toggle Ws 1 1 none 1010 0010 bbbb 0B00 0ppp ssss BTSC{.B} f,#bit4 Bit Test f, Skip If Clear 1 1 (2 or 3) none 1010 1111 bbbf ffff ffff fffb BTSC{.B} Ws,#bit4 Bit Test Ws, Skip If Clear 1 1 (2 or 3) none 1010 0111 bbbb 0000 0ppp ssss BTSS{.B} f,#bit4 Bit Test f, Skip if Set 1 1 (2 or 3) none 1010 1110 bbbf ffff ffff fffb BTSS{.B} Ws,#bit4 Bit Test Ws, Skip If Set 1 1 (2 or 3) none 1010 0110 bbbb 0000 0ppp ssss BTST f,#bit4 Bit Test f 1 1 Z 1010 1011 bbbf ffff ffff fffb BTST.C Ws,#bit4 Bit Test Ws to C 1 1 C 1010 0011 bbbb 0000 0ppp ssssPIC24 Family Instruction Set Summary page 3 Copyright Delmar Cengage Learning 2009. All Rights Reserved From Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family” Instr Descr #W #Cyc Status Machine Code BTST.Z Ws,#bit4 Bit Test Ws to Z 1 1 Z 1010 0011 bbbb 1000 0ppp ssss BTST.C Ws,Wb Bit Test Ws<Wb> to C 1 1 C 1010 0101 0www w000 0ppp ssss BTST.Z Ws,Wb Bit Test Ws<Wb> to Z 1 1 Z 1010 0101 1www w000 0ppp ssss BTSTS f,#bit4 Bit Test then Set f 1 1 Z 1010 1100 bbbf ffff ffff fffb BTSTS.C Ws,#bit4 Bit Test Ws to C, then Set 1 1 C 1010 0100 bbbb 0000 0ppp ssss BTSTS.Z Ws,#bit4 Bit Test Ws to Z, then Set 1 1 Z 1010 0100 bbbb 1000 0ppp ssss CALL Expr Call subroutine 2 2 none 0000 0010 nnnn nnnn nnnn nnn0 0000 0000 0000 0000 0nnn nnnn CALL Wn Call Indirect subroutine 1 2 none 0000 0001 0000 0000 0000 ssss CLR{.B} f f = 0x0000 1 1 none 1110 1111 0BDf ffff ffff ffff CLR{.B} WREG WREG = 0x0000 1 1 none 1110 1111 0BDf ffff ffff ffff CLR{.B} Wd Wd = 0x0000 1 1 none 1110 1011 0Bqq qddd d000 0000 CLRWDT Clear Watchdog Timer 1 1 none 1111 1110 0110 0000 0000 0000 COM{.B} f f = ~f 1 1 N,Z 1110 1110 1BDf ffff ffff ffff COM{.B} f,WREG WREG = ~f 1 1 N,Z 1110 1110 1BDf ffff ffff ffff COM{.B} Ws,Wd Wd = ~Ws 1 1 N,Z 1110 1010 1Bqq qddd dppp ssss CP{.B} f f - WREG 1 1 C,DC,N,V,Z 1110 0011 0B0f ffff ffff ffff CP{.B} Wb,#lit5 Wb - #lit5 1 1 C,DC,N,V,Z 1110 0001 0www wB00 011k kkkk CP{.B} Wb,Ws Wb - Ws 1 1 C,DC,N,V,Z 1110 0001 …
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