ArithmeticIntroduction• Representation of numbers• Limits on number size• Fractions and real numbers• Arithmetic operationsSigned and unsigned numbers• Radix or base of a number system– Base is indicated by subscript to actual number• If b is the radix, the value of ith digit d is given by: d × bi, with i starting at zero and increasing from right toleft• Example: 1011210112= ((1 × 20) + (1 × 21) + (0 × 22) + (1 × 23))10= ((1 × 1) + (1 × 2) + (0 × 4) + (1 × 8))10= (1 + 2 + 0 + 8)10= 1110• Bits are numbered 0, 1, 2, . . . from right to left in a word, with bit 0 being the least significant bit (lsb), andthe highest numbered bit being the most significant bit (msb)• With n bits, the maximum number that can be represented is given by 2n− 1• ascii vs binary numbers– Internal representation– Leading zeroes are not generally shown– Overflow as a result of arithmetic operation∗ Overflow handled by os or application– Sign and magnitude representation for negative numbers∗ Where to put sign bit? msb or lsb?∗ Adders may need an extra step to set the sign bit∗ Both positive and negative zero– 1’s complement∗ Flip all the bits∗ Still have positive and negative zero– 2’s complement∗ Used in all processors designed today∗ Sum of an n-bit number and its negative is 2n∗ Leading bit (msb) as 1 indicates a negative number∗ Positive numbers are represented as normal with leading bit zero∗ Only one zero representationArithmetic 2∗ For 8-bit numbers, the range is from +127 to -128, with just one 0∗ The decimal representation for a number is found by(−1) × xn−1× 2n−1+ xn−2× 2n−2+ xn−3× 2n−3+ · · · + x0× 20· Only the msb is multiplied by -1∗ Example: 111101002(original number is 8-bit)111101002= ((−1 × 27) + (1 × 26) + (1 × 25) + (1 × 24) + (0 × 23) + (1 × 22) + (0 × 21) + (0 × 20))10= ((−1 × 128) + (1 × 64) + (1 × 32) + (1 × 16) + (0 × 8) + (1 × 4) + (0 × 2) + (0 × 1))10= (−128 + 64 + 32 + 16 + 0 + 4 + 0 + 0)10= −1210– Signed load operation (load word)∗ Repeatedly copy the sign bit to fill the rest of the register∗ Also known as sign extension∗ Unsigned load simply fills the left of data with 0s∗ lb treats the byte as a signed number and performs sign extension into the register∗ lbu (load byte unsigned) works with unsigned integers– Overflow on 2’s complement numbers∗ Overflow occurs when the msb is not the same as what it would be if we had infinite bits– Memory addresses are always unsigned; same with some other data element types∗ C has int and unsigned int∗ Depending on our intention, the number F 416may be less than (−1210) or greater than (24410) 0∗ mips handles this distinction by providing two versions of set on less than instruction1. slt and slti work with signed integers2. sltu and sltiu work with unsigned integers– Example∗ Signed vs unsigned comparison· Let $s0 contain the number FFFF FFFF16, and register $s1 contain the number 0000 000116· Execute the following instructionsslt $t0, $s0, $s1 # signed comparisonsltu $t1, $s0, $s1 # unsigned comparison· $t0 has value 1 while $t1 has 0– Finding the 2’s complement representation∗ Find the representation of positive number∗ Flip the bits (change 1 to 0 and 0 to 1)∗ Add 1∗ Representation of −4210in 8-bits∗ 4210= 001010102∗ Flip the bits: 110101012∗ Add 1: 110101102– We add 1 to account for the fact that x + ¯x ≡ −1– Verify the result above by negating the number again∗ Flip the bits: 001010012∗ Add 1: 001010102– Operations involving numbers with different bit size representationArithmetic 3∗ To add a 16-bit number to a 32-bit number, perform sign extension∗ Simply replicate the msb into the new bits of 32-bit equivalent of 16-bit number• Binary to hex conversionAddition and subtraction• Addition is performed bit-by-bit with carry being passed to next digit to the left• Subtraction is performed by adding two numbers• Example: Add 610to 710710000001112+ 610000001102= 1310000011012• Example: Subtract 610from 710, or add −610to 710710000001112+ 610111110102= 110000000012• Overflow– No overflow when adding numbers of different sign (effectively, subtracting)– No overflow when subtracting numbers of same sign– Overflow if addition of two positive numbers gives a negative number, or addition of two negative numbersgives a positive number∗ The sign bit is set with the value of the result instead of the sign– In mips∗ add, addi, and sub cause exceptions on overflow∗ addu, addiu, and subu do not cause exceptions on overflow– C ignores overflows; mips compiler account for this by using the unsigned version of instructions• Exception (should not be called interrupt)– Unscheduled procedure call– mips has a register called exception program counter (epc)∗ Contains address of the instruction that caused exception– Instruction mfc0 (move from system control) copies epc into a general purpose register to provide forreturn to offending instruction∗ Problem: The contents of general purpose register will be destroyed, and we will not have the actualvalue in all the registers before the problem instruction when we return∗ Problem is solved by using two registers $k0 and $k1 for the os and their contents are not restoredon exceptionsLogical operations• May need to operate on groups of bits within a word• Instructions to simplify the packing and unpacking of bits in a wordArithmetic 4• Shift instructions– Move the bits in a word to the left or right– Original contents of a 8-bit register: 0010 1010– Contents after a shift left by 2: 1010 1000– mips instructions are called shift left logical ($sll) and shift right logical (srl)– Example:sll $t2, $s0, 8 # $t2 = $s0 << 8;op rs rt rd shamt funct6 bits 5 bits 5 bits 5 bits 5 bits 6 bitssll 0x00 0x00 0x10 0x0A 0x08 0x00– The shamt field in the R-format stands for shift amount– The encoding of sll is 0 in both the op and funct fields; rs is unused– Why do we have only five bits assigned to shift operation?• Bitwise AND and OR– Useful to extract the contents of a certain number of bits– Let register $t1 contain 0010 10102and register $t2 contain 0011 0000; then, the instructionand $t0, $t1, $t2 # $t0 = $t1 & $t2yields in register $t0 the value 0010 00002– and is usually applied with a mask to extract a set of bits– or is the dual to and– Applying or