Slide 1Chapter OutlineMetricsWhere is Power Dissipated in CMOS?Active (or Dynamic) PowerCharging CapacitorsApplied to Complementary CMOS GateSlide 8Charging Capacitors - RevisitedCharging CapacitorsCharging CapacitorsDynamic Power ConsumptionImpact of Logic FunctionImpact of Logic FunctionTransition Probabilities for Basic GatesActivity as a Function of TopologyHow about Dynamic Logic?Differential Logic?Evaluating Power Dissipation of Complex LogicReconvergent Fanout (Spatial Correlation)Temporal CorrelationsGlitching in Static CMOSExample: Chain of NAND GatesWhat Causes Glitches?Short-Circuit CurrentsShort-Circuit CurrentsModeling Short-Circuit PowerTransistors LeakSub-threshold LeakageSub-Threshold LeakageStack EffectStack EffectGate TunnelingOther sources of static power dissipationOther sources of static power dissipationSummary of Power Dissipation SourcesThe Traditional Design PhilosophyCMOS Performance OptimizationModel not Appropriate Any LongerThe New Design PhilosophyRelationship Between Power and DelayThe Energy-Delay SpaceEnergy-Delay Product as a MetricSlide 44SummaryReferencesJan M. RabaeyLow Power Design Essentials ©2008Chapter 3Power and Energy BasicsLow Power Design Essentials ©20083.2 Chapter OutlineMetricsDynamic powerStatic powerEnergy-delay trade-off’sLow Power Design Essentials ©20083.3 MetricsDelay (sec):–Performance metricEnergy (Joule)–Efficiency metric: effort to perform a taskPower (Watt)–Energy consumed per unit timePower*Delay (Joule)–Mostly a technology parameter – measures the efficiency of performing an operation in a given technologyEnergy*Delay = Power*Delay2 (Joule-sec)–Combined performance and energy metric – figure of merit of design styleOther Metrics: Energy-Delayn (Joule-secn)–Increased weight on performance over energyLow Power Design Essentials ©20083.4 Where is Power Dissipated in CMOS?Active (Dynamic) power–(Dis)charging capacitors–Short-circuit powerBoth pull-up and pull-down on during transitionStatic (leakage) power–Transistors are imperfect switchesStatic currents–Biasing currentsLow Power Design Essentials ©20083.5 Active (or Dynamic) PowerSources:Charging and discharging capacitorsTemporary glitches (dynamic hazards)Short-circuit currentsKey property of active power: fPdynwith f the switching frequencyLow Power Design Essentials ©20083.6 Charging Capacitors210CVE 221CVERRCV221CVECApplying a voltage stepValue of R does not impact energy!Low Power Design Essentials ©20083.7 Applied to Complementary CMOS GateOne half of the power from the supply is consumed in the pull-up network and one half is stored on CLCharge from CL is dumped during the 10 transitionIndependent of resistance of charging/discharging networkVddVoutiLCLPMOSNETWORKNMOSA1ANNETWORK210 DDLVCE 221DDLRVCE 221DDLCVCE Low Power Design Essentials ©20083.8 Circuits with Reduced Swing€ E0→1= VC0∞∫dVCdtdt = CV dVC0V −VT∫= CV (V −VTH)Energy consumed is proportional to output swingLow Power Design Essentials ©20083.9 Charging Capacitors - RevisitedRCEEE 102)( CVTRCERRCI221CVECDriving from a constant current source220)()( CVTRCTRIdtRIIEICVTREnergy dissipated in resistor can be reducedby increasing charging time T (that is, decreasing I)Low Power Design Essentials ©20083.10 Charging CapacitorsUsing constant voltage or current driver?Energy dissipated using constant current charging can be made arbitrarily small at the expense of delay:Adiabatic chargingEconstant_current < Econstant_voltageifT > 2RCNote: tp(RC) = 0.69 RC t0→90%(RC) = 2.3 RCLow Power Design Essentials ©20083.11 Charging CapacitorsDriving using a sine wave (e.g. from resonant circuit)Energy dissipated in resistor can be made arbitrarily smallif frequency w << 1/RC (output signal in phase with input sinusoid)RCv(t)221CVECLow Power Design Essentials ©20083.12 Dynamic Power ConsumptionPower = Energy/transition • Transition rate= CLVDD2 • f01 = CLVDD2 • f • P01 = CswitchedVDD2 • fPower dissipation is data dependent – depends on the switching probabilitySwitched capacitance Cswitched = P01CL= a CL(a is called the switching activity)Low Power Design Essentials ©20083.13 Impact of Logic FunctionA B Out0 0 10 1 01 0 01 1 0Example: Static 2-input NOR gateAssume signal probabilities pA=1 = 1/2 pB=1 = 1/2Then transition probability p01 = pOut=0 x pOut=1 = 3/4 x 1/4 = 3/16aNOR = 3/16aNOR = 3/16If inputs switch every cycleNAND gate yields similar resultLow Power Design Essentials ©20083.14 Impact of Logic FunctionA B Out0 0 00 1 11 0 11 1 0Example: Static 2-input XOR GateAssume signal probabilities pA=1 = 1/2 pB=1 = 1/2Then transition probability p01 = pOut=0 x pOut=1 = 1/2 x 1/2 = 1/4P01 = 1/4P01 = 1/4If inputs switch in every cycleLow Power Design Essentials ©20083.15 Transition Probabilities for Basic Gatesp01 AND (1 - pApB)pApBOR (1 - pA)(1 - pB)(1 - (1 - pA)(1 - pB))XOR (1 - (pA +pB – 2pApB))(pA + pB – 2pApB)Activity for static CMOS gatesa = p0p1As a function of the input probabilitiesLow Power Design Essentials ©20083.16 Activity as a Function of TopologyaNOR,NAND = (2N-1)/22N aXOR = 1/4XOR versus NAND/NORXORNAND/NORLow Power Design Essentials ©20083.17 How about Dynamic Logic?Energy dissipated when effective output is zero!or P0→1 = P0VDDEvalPrechargeAlways larger than P0P1!Activity in dynamic circuits hence always higher than static.But … capacitance most often smaller.E.g. P0→1(NAND) = 1/2N ; P0→1(NOR) = (2N-1)/2NLow Power Design Essentials ©20083.18 Differential Logic?VDDOutOutGateStatic: Activity is doubled Dynamic: Transition probability is 1!Hence: power always increases.Low Power Design Essentials ©20083.19 Evaluating Power Dissipation of Complex LogicSimple idea: start from inputs and propagate signal probabilities to outputsBut:–Reconvergent fanout–Feedback and temporal/spatial correlationsP1Low Power Design Essentials ©20083.20 Reconvergent Fanout (Spatial Correlation)PZ = 1- PA . P(X|A) = 1Becomes complex and intractable real fastInputs to gate can be interdependent (correlated)no reconvergencePZ = 1-(1-PA)PBreconvergentPZ = 1-(1-PA)PA ?NO!PZ = 1reconvergenceMust use conditional probabilitiesPZ: probability that Z=1probability that X=1 given that A=1Low Power Design Essentials ©20083.21 Temporal CorrelationsActivity estimation the hardest part