1Integrated ProcessesThara SrinivasanLecture 14Picture credit: Lemkin et al.2Lecture Outline• From reader• Bustillo, J. et al., “Surface micromachining of MEMS,” pp. 1556-9.• A.E. Franke et al., “Polycrystalline silicon germanium films for integrated microsystems,” 160-71. • T. J. Brosnihan et al., “A Fabrication Process for MEMS Optical Switches with Integrated On-Chip Electronics,” pp. 1638-42.• C. Bellew, et al., “An SOI Process for Fabrication of …” pp. 1075-9.• Today’s Lecture• Hurdles and benefits of process integration• Modular processes• CMOS before MEMS• MEMS before CMOS• Interleaved processes• MEMS by foundry CMOS23Types of IntegrationCMOSMEMSMEMSCMOSMEMSCMOSMEMSCMOSModuleMotorolaMEMSCMOSBerkeleyIntel Analog Devices4Integrated Monolithic MEMS• Motivation for co-fabrication• Improved device performance, higher signal-to-noise ratio• Reduced size, power requirement• IC compatibility = economical manufacturing• Automatic alignment; packaging combinedCMOS Surface MicromachiningCommon featuresProcess FlowVertical DimensionLateral DimensionComplexityStandard ~1 µm<1 µm>10 masksApplication specific~1-5 µm2-10 µm2-6 masksSi-based, same materials and etching principlesYun35Thermal Budget• Critical temperatures for Al metallization• Degradation at T > 400-450°C• Junction migration at T = 950°C• Junction spiking• Critical process temperatures for MEMSTemperature Material450°C6106508009501050LTO/PSGLow stress polySiDoped polySiNitridePSG densificationPolySi stress annealingLPCVDAnnealingW. Yun, PhD Thesis, BSAC6Benefits and Hurdles• Benefits to integration• Lower parasitic capacitance and parasitic resistance, greater sensitivity• Increased reliability, reduced size and package complexity• Challenges to integration• MEMS layer deposition and anneal temperatures• Passivation of CMOS during MEMS etching and release steps• Surface topography of MEMS• Materials incompatibilities• Yield losses multiplied• Special purpose electronics may be needed47This Lecture• Modular processes• CMOS before MEMS• UC Berkeley Modular Integration • UCB polysilicon germanium• SOI MEMS, UCB and Analog Devices• MEMS before CMOS• Sandia Labs MM/CMOS• Interleaved CMOS and MEMS• Analog Devices BiMEMS• Bosch epipoly • MEMS by CMOS foundry• Parameswaran et al., University of Alberta, 1988• Fedder et al., Carnegie Mellon, 19968Modular Processes• CMOS before MEMS+ IC foundry can be used+ Chip area may be minimized– Thermal budget is an issue• MEMS before CMOS+ No thermal budget for MEMS– Microstructure topography is an issue– Electronics and MEMS cannot be easily stacked – IC foundries are wary of pre-processed wafers (materials constraints)59UCB Process• Refractory metallization (e.g. tungsten), makes possible high-temperature post-processing• Double-poly, single-metal CMOS, passivated with PSG• Low-stress nitride for protection from release etch• MEMS-CMOS interconnect: MEMS ground plane doped poly to CMOS gate polyYun et al.CMOS → MEMS 1 10UCB Process• Issues• Tungsten, W, reacts with Si at 600°C to form WSi2→ diffusion barrier is needed; e.g. TiN/TiSi2• Problems• W forms hillocks during annealing, relatively high contact resistance• Mainstream CMOS processes are optimized for Al (now Cu)• Heavily doped MEMS layers can affect CMOSCMOS → MEMSCMOS → MEMS 1611Polysilicon Germaniumpoly-Gepoly-SiGesilicon dioxidepoly-GeA. Franke PhD, J. Heck PhD, Howe and King groupsequiaxed columnar• Poly-Si1-xGex• Low temperature, Low resistivity with doping• n-type poly-Ge structural; SiO2sacrificial• p-type poly-Si0.35Ge0.65structural; poly-Ge sacrificial• Deposition• LPCVD thermal decomposition of GeH4and SiH4or Si2H6• Rate >50 Å/min, T < 475°C, P = 300-600 mT• At higher [Ge]: rate ↑, T ↓• In-situ doping, ion implantationCMOS → MEMSCMOS → MEMS 2 12Polysilicon Germanium• Dry etching• Similar to poly-Si; F, Cl, and Br-containing plasmas• Rate ~ 0.4 µm/min• Wet etching• H2O2, 90°C: 4 orders of magnitude selectivity between >80% and <60% Ge content.• Good release etchantJ. Heck PhD thesis, Howe and King groupsCMOS → MEMSCMOS → MEMS 2713Poly-SiGe Mechanical Properties• Conformal deposition• Low stress as-deposited• Films have high roughness• Young’s modulus ~146 GPa (poly-Si0.35Ge0.65)• Fracture strain 1.7% (compared to 1.5% for MUMPS polySi)• Q = 30,000 for n-type poly-Ge in vacuum• Poly-SiGe mechanically on par with poly-SiFrankeStress (MPa)-59-65+18+45+86-110 - -530+500 - +670-800 -600 -400 -200 0 200 400 600 800Franke: 26% GeFranke: 41% GeFranke: 58% GeFranke: 79% GeFranke: 100% GeKrulevitch: poly-SiCompressive TensileCMOS → MEMSCMOS → MEMS 2 14UCB Poly-SiGe Process• 3 µm standard CMOS process, Al metallization• p-type poly-Si0.35Ge0.65structural; poly-Gesacrificial• MEMS-CMOS interconnect through p-type poly-Si strap• Process:• CMOS passivated with LTO, 400°C• Vias to connection strap opened• Ground plane deposited, MEMS built.• RTA anneal to lower resistivity (550°C, 30s)A. Franke PhDCMOS → MEMSCMOS → MEMS 2815Integrated SOI MEMSakmxkxFmaF===Si waferSiO2Si (100) layerSilicon-on-Insulator waferM. Lemkin, PhD, BSACInetgrated Micro Instruments• To increase resolution of inertial sensor• Reduce spring stiffness• Increase proof mass• Silicon-on-insulator integrated process• MEMS 25× thicker than with poly surface micromachining• SCS MEMS: zero stress and stress gradient• Integration of high sensitivity structures with circuitry gives 5-25×better resolutionCMOS → MEMSCMOS → MEMS 3 16SOI MEMS Process • Trench (2 µm wide) encloses future MEMS region• Insulating silicon nitride fills trench• Silicon nitride etched back from wafer surface• Standard CMOS made and interconnected to future MEMS by metal or doped poly• MEMS structures defined using deep etch• Buried oxide etched to release MEMSLemkin et al.CMOS → MEMSCMOS → MEMS 3917SOI MEMSBrosnihan et al.CMOS → MEMSCMOS → MEMS 3 18SOI Accelerometer Parameters• Chip size 3.4 × 2.9 mm²• Sensor size 1 × 1.5 mm²• Proof mass 52 µg• Resonant frequency 3 kHz• Sense capacitance 9.7 pF• Full scale ±1.75 g• Power consumption 5 V x 5 mA• Sensitivity 102 fF / g• Noise floor 25 µg / √Hz• On-chip A/D conversionLemkin et al.CMOS → MEMSCMOS → MEMS 31019Sandia
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