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Review Major Components of a Computer Processor Control Devices Memory Datapath IOSystems 1 Output Input Important metrics for an I O system Performance Expandability Dependability Cost size weight Input and Output Devices I O devices are incredibly diverse with respect to Behavior input output or storage Partner human or machine Data rate the peak rate at which data can be transferred between the I O device and the main memory or processor Device Partner Keyboard input human 0 0001 Mouse input human 0 0038 Laser printer output human 3 2000 Graphics display output human 800 0000 8000 0000 Network LAN input or output machine 100 0000 1000 0000 Magnetic disk storage machine 240 0000 2560 0000 IOSystems 2 Data rate Mb s 8 orders of magnitude range Behavior I O Performance Measures I O bandwidth throughput amount of information that can be input output and communicated across an interconnect e g a bus to the processor memory I O device per unit time 1 How much data can we move through the system in a certain time 2 How many I O operations can we do per unit time I O response time latency the total elapsed time to accomplish an input or output operation IOSystems 3 An especially important performance metric in real time systems Many applications require both high throughput and short response times A Typical I O System Processor Interrupts Cache Memory I O Bus Main Memory I O Controller Disk IOSystems 4 Disk I O Controller I O Controller Graphics Network I O System Performance Designing an I O system to meet a set of bandwidth and or latency constraints means 1 Finding the weakest link in the I O system the component that constrains the design The processor and memory system The underlying interconnection e g bus The I O controllers The I O devices themselves 2 Re configuring the weakest link to meet the bandwidth and or latency requirements 3 Determining requirements for the rest of the components and re configuring them to support this latency and or bandwidth IOSystems 5 I O System Performance Example A disk workload consisting of 64KB reads and writes where the user program executes 200 000 instructions per disk I O operation and a processor that sustains 3 billion instr s and averages 100 000 OS instructions to handle a disk I O operation The maximum disk I O rate I O s s of the processor is Instr execution rate 3 x 109 3 10 000 I O s s Instr per I O 200 100 x 10 a memory I O bus that sustains a transfer rate of 1000 MB s Each disk I O reads writes 64 KB so the maximum I O rate of the bus is Bus bandwidth 1000 x 106 15 625 I O s s 3 Bytes per I O 64 x 10 SCSI disk I O controllers with a DMA transfer rate of 320 MB s that can accommodate up to 7 disks per controller disk drives with a read write bandwidth of 75 MB s and an average seek plus rotational latency of 6 ms what is the maximum sustainable I O rate and what is the number of disks and SCSI controllers required to achieve that rate IOSystems 7 Disk I O System Example Processor 10 000 I O s s Cache Memory I O Bus 15 625 I O s s 320 MB s Main Memory I O Controller I O Controller Disk Disk Disk Disk Up to 7 IOSystems 8 75 MB s I O System Performance Example Con t So the processor is the bottleneck not the bus disk drives with a read write bandwidth of 75 MB s and an average seek plus rotational latency of 6 ms Disk I O read write time seek rotational time transfer time 6ms 64KB 75MB s 6 9ms Thus each disk can complete 1000ms 6 9ms or 146 I O s per second To saturate the processor requires 10 000 I O s per second or 10 000 146 69 disks To calculate the number of SCSI disk controllers we need to know the average transfer rate per disk to ensure we can put the maximum of 7 disks per SCSI controller and that a disk controller won t saturate the memory I O bus during a DMA transfer Disk transfer rate transfer size transfer time 64KB 6 9ms 9 56 MB s Thus 7 disks won t saturate either the SCSI controller with a maximum transfer rate of 320 MB s or the memory I O bus 1000 MB s This means we will need 69 7 or 10 SCSI controllers IOSystems 9 I O System Interconnect Issues A bus is a shared communication link a single set of wires used to connect multiple subsystems that needs to support a range of devices with widely varying latencies and data transfer rates Advantages Versatile new devices can be added easily and can be moved between computer systems that use the same bus standard Low cost a single set of wires is shared in multiple ways Disadvantages Creates a communication bottleneck bus bandwidth limits the maximum I O throughput The maximum bus speed is largely limited by The length of the bus The number of devices on the bus IOSystems 10 Bus Characteristics Control lines Master initiates requests Bus Master Bus Slave Control lines Signal requests and acknowledgments Indicate what type of information is on the data lines Data lines Data lines Data can go either way Data addresses and complex commands Bus transaction consists of Master issuing the command and address Slave receiving or sending the data Defined by what the transaction does to memory request action Input inputs data from the I O device to the memory Output outputs data from the memory to the I O device IOSystems 11 Types of Buses Processor memory bus proprietary Short and high speed Matched to the memory system to maximize the memoryprocessor bandwidth Optimized for cache block transfers I O bus industry standard e g SCSI USB Firewire Usually is lengthy and slower Needs to accommodate a wide range of I O devices Connects to the processor memory bus or backplane bus Backplane bus industry standard e g ATA PCIexpress The backplane is an interconnection structure within the chassis Used as an intermediary bus connecting I O busses to the processor memory bus IOSystems 12 Synchronous and Asynchronous Buses Synchronous bus e g processor memory buses Includes a clock in the control lines and has a fixed protocol for communication that is relative to the clock Advantage involves very little logic and can run very fast Disadvantages Every device communicating on the bus must use same clock rate To avoid clock skew they cannot be long if they are fast Asynchronous bus e g I O buses It is not clocked so requires a handshaking protocol and additional control lines ReadReq Ack DataRdy Advantages Can accommodate a wide range of devices and device speeds Can be lengthened without worrying about clock skew or synchronization problems IOSystems 13 Disadvantage slow er Asynchronous


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WM CSCI 424 - IO Systems

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