DOC PREVIEW
VCU EGRE 427 - EGRE 427 syllabus

This preview shows page 1-2 out of 7 pages.

Save
View full document
View full document
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience
View full document
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience
Premium Document
Do you want full access? Go Premium and unlock all 7 pages.
Access to all documents
Download any document
Ad free experience

Unformatted text preview:

VIRGINIA COMMONWEALTH UNIVERSITYSCHOOL OF ENGINEERINGEGRE 427 Spring 2001Advanced Digital DesignCredits: 4 (3 hours lecture, 3 hours laboratory)Prerequisites: EGRE 426 Computer Organization and DesignInstructor: Dr. Robert Klenke, Course DirectorPhone: 827-7007 Email: [email protected] Hours: T,R 1:00 – 2:00Course Web Page: http://www.people.vcu.edu/~rhklenke/egre427/index.htmlCourse Text: Michael John Sebastian Smith : Application-Specific Integrated Circuits;Addison-Wesley, 1997.Course Description:This is an elective course in the computer engineering sequence that provides studentswith practical foundations for the design, implementation, and testing of digitalsystems. It expands on the digital and computer system theory presented in prerequisitecourses.Topics covered include, microcontrollers and embedded processors, application specificIC (ASIC) architectures and implementing digital systems with ASICs, logic synthesis,design methodologies, hardware/software codesign, production testing and design fortestability, and construction, testing, and debugging of digital system prototypes. In thelaboratory, the students will design, construct, test and debug a multidisciplinary,computer-based, hardware/software system for their senior design project. In order tomaster the material being covered during the semester, drill problems will be assignedin addition to the presented lecture material. The drill problems should be completedconcurrently with the lecture material. The problems will be graded, and solutions willbe made available.Course ObjectivesUpon successful completion of this course, the student will be able to:1. Understand the typical features of an embedded microcontroller and how they areapplied in controling real-time systems.2. Write synthesizable behavioral VHDL descriptions of combinational andsequential logic and map them to a gate-level implementation using automaticsynthesis tools3. Understand the types of Application Specific Integrated Circuit (ASIC) devicesavailable, including PLDs and FPGAs, what their internal architecture is, and howthat influences their use in implementing digital systems4. Understand the goals of production testing of digital devices and some of the toolsand techniques used to perform it.5. Understand what hardware/software partitioning and codesign is and some of thetools and techniques used to perform it.6. Design, construct, test and debug a computer-based hardware/software system.The course laboratory exercises involve becoming familiar with the use of MentorGraphics and Actel commercial EDA tools used for designing and implementing adigital system in an FPGA, the use of the Microchip tools for developing software for aPIC microcontroller, and other tools such as the Tektronix TLA 714 logic analyzer usedto actually build and test a digital system. Much of the laboratory time will be devotedto working on the student’s capstone design project in the computer engineering area.A course syllabus detailing the course plan, topical contents, and assignments isattached.Laboratory ExercisesAs stated above, the lab exercises are designed to help you learn the tools that will beused to design and implement you senior design project. Attendance at the laboratoryperiods is mandatory and a class/lab participation grade will be give that will bepartially based on attendance. Successful completion of all lab exercises isrequired to pass this course.Each formal lab exercise will be documented by the student with a lab write-up. The labwrite-up should include the following items: 1) a brief description of lab objective andprocess, 2) a printout of all schematics and plots of the lab results, 3) a brief analysis ofthe results of the lab, 4) a description of any problems encountered, recommendationsfor changes, or improvements to the lab exercise. All lab exercises must be typeset andsubmitted in hardcopy.Course Grading PolicyFinal course grades will be determined as follows:Midterm 15%Homework/Laboratory 20%Class Participation 5%Design Project 45%Final exam 15%There is a 10%/day “penalty” on the grade for late assignments. Class participationgrade will be determined from lecture and lab attendance and the student’s participationin the in-class discussions.Engineering PortfoliosAs part of the ABET accreditation process, each student is required to maintain aportfolio of major assignments in each of their classes. For this course, the portfoliomust contain, at a minimum, one of the lab write-ups and the final design project write-up.University Policy on Cheating and PlagiarismIt is imperative that all graded assignments that you turn in during the course reflectyour own understanding of the material. Copying answers from another person impedesthe learning process and compromises your integrity. Students are encouraged todiscuss homework problems and laboratory assignments with others, but submittedsolutions must involve only an individual’s effort. Any student who copies fromanother student’s homework, quiz, exam, report, etc., or any student who knowinglyallows another student to copy his or her work, or any student who submits someoneelse’s work as his or her own, will be deemed guilty of cheating. Cheating is anextremely serious offense. Each student is expected to have read and understood theVCU Honor System Policy, as set forth in the 1998-99 VCU Resource Guide publishedby the Division of Student Affairs.For this course, the following standards for each assignment will be used:1. Quizzes and the Final Exam will be in-class and completely pledged as yourown work.2. Homework must be completely pledged as your own work. Any assistance onthe homework must be obtained from the instructor only.3. Laboratory write-ups must be your own work and all references must becorrectly cited. All schematics and simulations must be your own work andstored in your directory. However, if you require help in using the tools,interpreting the function of the components, or debugging your design, youmay obtain help from fellow students.4. The final design project must be ONLY the work of you and your projectpartners. No help from any other group may be obtained.Americans with Disabilities Act"Section 504 of the Rehabilitation Act of 1973 and the Americans with Disabilities Actof 1990 require Virginia Commonwealth University to provide academic adjustments oraccommodations for students with documented disabilities. Students seeking


View Full Document

VCU EGRE 427 - EGRE 427 syllabus

Download EGRE 427 syllabus
Our administrator received your request to download this document. We will send you the file to your email shortly.
Loading Unlocking...
Login

Join to view EGRE 427 syllabus and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view EGRE 427 syllabus 2 2 and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?