11Electrical and Computer EngineeringCPE/EE 422/522 Chapter 4 - Design of Networks for Arithmetic OperationsDr. Rhonda Kay GaedeUAHElectrical and Computer EngineeringPage 2 of 29UAH CPE/EE 422/522Chapter 44.1 Design of a Serial Adder with Accumulator - SchematicCase Study: Serial Adder with Accumulator2Electrical and Computer EngineeringPage 3 of 29UAH CPE/EE 422/522Chapter 44.1 Design of a Serial Adder with Accumulator - OperationElectrical and Computer EngineeringPage 4 of 29UAH CPE/EE 422/522Chapter 44.2 State Graphs for Control Networks• Use variable names instead of 0s and 1s– E.g., XiXj/ZpZq•if Xiand Xjinputs are 1, the outputs Zpand Zqare 1 (all other outputs are 0s)– E.g., X = X1X2X3X4, Z = Z1Z2Z3Z4•X1X4’/Z2Z3== 1 - - 0 / 0 1 1 03Electrical and Computer EngineeringPage 5 of 29UAH CPE/EE 422/522Chapter 44.2 State Graphs for Control Networks - Constraints on Input Labels• Assume: I – input expression => we traverse the arc when I=1Assures that at most one input label can be 1 at any given timeAssures that at least one input label will be 1 at any given time1 + 2: Exactly one label will be 1 => the next state will be uniquely defined for every input combinationElectrical and Computer EngineeringPage 6 of 29UAH CPE/EE 422/522Chapter 44.2 State Graphs for Control Networks - Constraints on Input Labels (cont’d)4Electrical and Computer EngineeringPage 7 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier - TermsNote: we use unsigned binary numbersElectrical and Computer EngineeringPage 8 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Block DiagramAd – add signal // adder outputs are stored into the ACCSh – shift signal // shift all 9 bits to rightLd – load signal // load multiplier into the 4 lower bits of the ACC and clear the upper 5 bits5Electrical and Computer EngineeringPage 9 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Multiplication ExampleElectrical and Computer EngineeringPage 10 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -State Graph6Electrical and Computer EngineeringPage 11 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Behavioral VHDL ModelElectrical and Computer EngineeringPage 12 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Behavioral VHDL Model (cont’d)7Electrical and Computer EngineeringPage 13 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Multiplier Control with Counter• Current design: control part generates the control signals (shift/add) and counts the number of steps• If the number of bits is large (e.g., 64),the control network can be divided intoa counter and a shift/add controlElectrical and Computer EngineeringPage 14 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Multiplier Control with CounterAdd-shifts control: tests St and M and generates the proper sequenceof add and shift signalsCounter control: counter generates a completion signal K that stops the multiplier after the proper number of shiftshave been completed8Electrical and Computer EngineeringPage 15 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Multiplier Control with Counter• Increment counter each time a shift signal is generated• Generate K after n-1 shifts occuredElectrical and Computer EngineeringPage 16 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Operation Using a Counter9Electrical and Computer EngineeringPage 17 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Array MultiplierWhat do we need to realizeArray Multiplier?AND gates = ?FA = ?HA = ?Electrical and Computer EngineeringPage 18 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Array Multiplier (cont’d)10Electrical and Computer EngineeringPage 19 of 29UAH CPE/EE 422/522Chapter 44.3 Design of a Binary Multiplier -Array Multiplier (cont’d)• Complexity of the N-bit array multiplier– number of AND gates = ?– number of HA = ?– number of FA = ?• Delay– tg – longest AND gate delay– tad – longest possible delay through an adderElectrical and Computer EngineeringPage 20 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers• How to multiply signed binary numbers?• Procedure– Complement the multiplier if negative– Complement the multiplicand if negative– Multiply two positive binary numbers– Complement the product if it should be negative• Simple but requires more hardware and timethan other available methods11Electrical and Computer EngineeringPage 21 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers• Four cases– Multiplicand is positive, multiplier is positive– Multiplicand is negative, multiplier is positive– Multiplicand is positive, multiplier is negative– Multiplier is negative, multiplicand is negative•Examples– 0111 x 0101 = ?– 1101 x 0101 = ?– 0101 x 1101 = ?– 1011 x 1101 = ?• Preserve the sign of the partial product at each step• If multiplier is negative, complement the multiplicand before adding it in at the last stepElectrical and Computer EngineeringPage 22 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - 2’s Complement Multiplier12Electrical and Computer EngineeringPage 23 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - State GraphElectrical and Computer EngineeringPage 24 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - Faster Multiplier• Move wires from the adder outputs one position to the right =>add and shift can occur at the same clock cycle13Electrical and Computer EngineeringPage 25 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - New State GraphElectrical and Computer EngineeringPage 26 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - New Behavioral Model14Electrical and Computer EngineeringPage 27 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - New Behavioral ModelElectrical and Computer EngineeringPage 28 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - Simulation15Electrical and Computer EngineeringPage 29 of 29UAH CPE/EE 422/522Chapter 44.4 Multiplication of Signed Binary Numbers - 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