New DevicesHintsSimulationWhat to turn inProject #4EE365Clarkson UniversitySummer 2003This is a group project, so please form groups of two (no more, no less). You and your partner will both get the same grade for the project. If you don’t let me know who your partner is by the end of class on 6/12, then I will assign one for you.Your job is to design a new traffic-light controller for the intersection between the overpass and Market Street in Potsdam (the light near Stewart’s). Below is a diagram of the intersection. 321SWWWWWKEY1Traffic Light #1WWalk Button and LightSCar SensorBelow is a close-up of what the lights look like with signal names (system outputs) included:1 21R1Y1G31LY1LG2R2Y2G3R3Y3G2NR3NRLight #1 has green and yellow left turn arrows. Light #2 and #3 have a “No Turn on Red” light that can be switched on and off. There is also a Walk light on each corner:This light has three states: “Walk”, “Don’t Start Walking” and “Don’t Walk”. We’ll call these WG, WY and WR respectively. Assume that this light takes a constant input to turn on any of these states (i.e., you don’t have to make the light blink for“don’t start walking”). Near these lights is a button that pedestrians can push when they want to request a walk signal. We’ll call this signal “W”. Note that it only goes high for as long as the pedestrian is pushing it.There is also a sensor in the left-hand turn lane at light #1. This goes high whenever a car is parked over it. We will call this “S”.The other inputs to the system are 2 clocks. One has a frequency of 10 kHz and the other has a frequency of 1 Hz.In Summary, here are the inputs and outputs to the system:Inputs: W, S, Fast_Clock, Slow_ClockOutputs: 1LG, 1LY, 1G, 1Y, 1R, 2G, 2Y, 2R, 2NR, 3G, 3Y, 3R, 3NR, WG, WY, WRBelow is a Pseudo-State-Diagram. Note that same-state loops have been left out to save on clutter (assume an “else” statement for each one returns it to the same state). Also note the two new inputs: t1 and t2. These are two preset lengths of time that will be derived from the slow_clock system input using a counter. t1 = 4 seconds and t2 = 15 seconds.13G 13Y 2G 2YWG WY 1LG 1LYt1 t2 t1t2•S’t2•Wt1t2 t2•St2•S’t2The states that I have given mean the following:- 13G  light #1 and #3 Green- 13Y  light #1 and #3 Yellow- 2G  light #2 Green- 2G  light #2 Yellow- WG  Walk Green (or “Walk”)- WY  Walk Yellow (or “Don’t Start Walking”)- 1LG  light #1 Left Green Arrow- 1LY  light #1 Left Yellow ArrowAlso note that I left out outputs since there are so many of them. They can be set up as in a Moore machine. With a few exceptions, they should all be self-explanatory (e.g., state: 13G outputs: 1G = ‘1’, 2R = ‘1’, 3G = ‘1’, WR = ‘1’, everything else ‘0’). In states 1LG and 1LY, 3NR should be ‘1’. Also, notice that the transition from 1LG to 1LY is t2•S’. This means that every 4 seconds, the system checks to see if a car is still on the sensor and as long as a car is there, the left arrow stays on.New DevicesIn addition to any of the devices used in Projects 1, 2 and 3, you may add the following devices to your collection:- SN74HC161, 4-Bit Synchronous Binary Counters- SN74HC273, Octal D-Type Flip-Flops With ClearHints- There are several ways to make use of the SN74HC161. One is to have a couple outputs on the counter corresponding to t1 and t2, which would become inputs to the main system. With this method, you may also want to add an additional state for each of the existing states where the output resets the counter.- You should create a separate “mini-circuit” to store the ‘1’ value when a pedestrian pressed the walk button. This stored value will need to be reset once the state-machine makes use of this input.- You may want to separate other parts of the design (conceptually) into “mini-circuits” as well. For example, four circuits: counter/timer, walk-signal conditioning, state machine and output logic. The overall circuit will be quite a bit larger than the previous projects, thus drawing it on one page may be difficult (both conceptually and physically).- When I ask you to model an IC that contains several of the same device, you only need to write code to model one of these devices. For example VHDL code for a SN74HC00 Quad NAND should implement only one NAND gate, not 4.SimulationInitialize your system and let it run with no inputs (S=0 and W=0) for one cycle. Then, on the start of the next cycle, add inputs (S=1 and W=1). Note that you will also need to input the clock behavior for the two clocks that I have given you.What to turn in- Circuit Schematic with devices and nodes labeled as in the code (hand-written is OK). If it gets too big, you can certainly draw an overall block diagram and show the circuits separately for each block.- Any state/output or transition/excitation tables that you use to create your circuit (hand-written is OK)- A state diagram (hand-written is OK)- Printout from WAVE program with a time range that shows all input combinations and that includes all intermediate and output signals.- All ‘.vhd’ files on CD or floppy- All ‘.wlf’ files (produced by “Save Data Set” in “Wave”) on CD or floppy- Everything labeled with name and student #Files should be named “lastname_proj4.xxx” where lastname is the last name of one of the group members and xxx is the respective file