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Chapter 7 Integer ArithmeticTopics32-Bit Intel Processor ArchitectureShift and Rotate InstructionsSlide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Slide 13Shift and Rotate Instructions ExamplesSlide 15Extended Addition and SubtractionSlide 17Multiplication and DivisionSlide 19Slide 20Slide 21Slide 22ASCII and Packed Decimal ArithmeticFloating-Point Unit (FPU)The Floating Point Unit (FPU)Floating Point InstructionsFloating Point Instructions (continued)Slide 28Slide 29Floating Point Instructions Data StorageSlide 31FPU Addition InstructionFPU Addition Instruction ExamplesFPU Addition Instruction Examples (continued)Slide 35FCU Subtraction InstructionFCU Subtraction Instruction ExamplesSlide 38FPU Multiplication InstructionsFPU Multiplication Instructions ExamplesFPU Multiplication Instruction Example (continued)FPU Division InstructionsFPU Division Instructions ExamplesAdditional Arithmetic FPU InstructionsFPU Comparison InstructionsSlide 46FPU Comparison Instructions ContinuedFPU Comparison Instructions ExamplesFPU Comparison Instructions Examples (continued)Programming With Floating-Point InstructionsASCII to Floating Point Conversion AlgorithmASCII to Floating Point Conversion ProcedureSlide 53ASCII to Floating Point Conversion Procedure ContinuedCSC 20601/13/19 1Chapter 7 Integer ArithmeticInstructor: James Hutchinson AdditionSubtractionMultiplication DivisionCSC 20601/13/19 2TopicsShift and Rotate InstructionsSample ApplicationsExtended Addition and SubtractionMultiplication and DivisionApplicationASCII and Packed Decimal ArithmeticReview QuestionsCSC 20601/13/19 332-Bit Intel Processor Architecture EAXEBXECXEDX EBP ESI EDI ESP ECS EDS ESS EESALU Flag RegisterIPAddr RegisterB BusA BusData BusAddr BusCSC 20601/13/19 4Shift and Rotate InstructionsShift and Rotate Instructions provide a way to move bits within a 8, 16, or 32 bit data object.Each of these instructions affect the Overflow and carry flags.Mnemonic DescriptionSHL Shift LeftSHLD 32-bit Shift LeftSHR Shift RightSHRD 32-bit Shift RightSAL Shift Arithmetic LeftSAR Shift Arithmetic RightROL Rotate LeftROR Rotate RightRCL Rotate Carry LeftRCR Rotate Carry RightShift and Rotate InstructionsCSC 20601/13/19 5Shift and Rotate InstructionsThe Shift Left Instruction (SHL).Definition: Shifts each bit in a destination operand to the left, filling the right-most bit location with a zero. The left most bit is shifted into the carry flag.General Form: SHL destination, 1SHL destination, CLSHL destination, eight_bit_immediateWhere: Destination is any 8 or 16 bit register or memory location.The source can be the constant 1 or an 8-bit value stored in the CL register.With 80286 and later processors, the source can be an 8-bit immediate value.Examples:shl bl,1 shl wordval, 1 shl byte ptr[si],1shl al, cl shl bx, 5 ;requires 80286 processor or higherCSC 20601/13/19 6Shift and Rotate InstructionsApplications of the SHL instruction.Fast MultiplicationExamining each bit of a register or memory location.The SHLD/SHRD Instruction.Definition: The SHLD shifts left a 16 or 32 bit value a given number of bits. The bit positions opened up by the count are filled by the most significant bits of the source operand. The source operand is not affected, but the sign, zero, auxiliary, parity, and Carry flags are affected.Definition: The SHRD instruction shifts a16 or 32 bit value to the right a given number of bits. The bit positions opened up by the count are filled by the least significant bits of the source operand.CSC 20601/13/19 7Shift and Rotate InstructionsGeneral Form of SHLD and SHRD Instruction: shld dest, src, countWhere: Dest. and Src are 16 or 32 bit registers or memory locations Count is an 8-bit immediate value.Examples, .data 1 wordValue dw 9ba6h .code2 mov ax, 0ac36h3 shld wval, ax,41 0 1 0 1 1 0 0 0 0 1 1 0 1 1 015 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0AX Register after instruction 2 executes1 0 0 1 1 0 1 1 1 0 1 0 0 1 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0wordValue after instruction 11 1 0 0 0 0 1 1 0 1 1 0 1 0 0 115 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0The AX Register after instruction 3 executesCSC 20601/13/19 8Shift and Rotate InstructionsThe Shift Right (SHR) instruction.Definition: The SHR instrurction shifts each bit of an 8 or 16 bit operand to the right n number of bits. The least significant bit is copied into the carry flag. The bit that was in the carry flag is lost.General Form: shr destination, nWhere: destination is value locate in a 8 or 16 bit register or an 8 or 16 bit memory location. N is either the constant 1, a value stored in the CL register.Examples: shr bl, 1 ;shift the value in the bl regester 1 place to the right shr ecx, 1 ;shift the value in the ecx, register 1 place to the right shr wordval, 1 ;shift the value in memory location wordval 1 place to the righshr byte ptr[si] ;shift the value in the memory location pointed to by SIshr al, cl ;shift the 8-bit value in the AL register cl places to the right shr ax, 5 ;shift the 16-bit value in AX 5 places to the right (80386 proc)CSC 20601/13/19 9Shift and Rotate InstructionsShift Arithmetic Left (SAL) instruction.Definition: Shifts an 8 or 16 bit value located in a register or memory location to the left n number of times. The Most Significant Bit (MSB) is copied both into the carry flag and the Lest Significant bit is cleared.General Form: SAR destination, nWhere: destination is an 8 or 16 bit register; or an 8 or 16bit memory location. n is either the numeric constant 1; or n is an 8-bit unsigned value stored in the CL register. If the 80386 instruction set is used, n can be any 8-bit immediate value.Example:sal ax, cl ;shift the vlaue in the ax register cl timessal val1, cl ;shift the value stored in location val1 cl timessal al, 1 ;shift the value stored in AL register 1 timesal val1, 1 ;shift the value stored in val1, 1 time to the leftCSC 20601/13/19 10Shift and Rotate InstructionsShift Arithmetic Right (SAR) instructions.Definition: Shifts an 8 or 16 bit value located in a register or memory location to


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NOVA CSC 206 - Integer Arithmetic

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