Process and performance of a-Si and poly-Si TFTs on plastic MSE 542 Flexible Electronics 5/19/06 Amy Turner1. Introduction: A major advancement in the field of flexible electronics has been the development of a method to deposit and process silicon on polymer substrates. Typical electronic devices are fabricated on silicon substrates in fabrication lines with process temperatures as high as 1050 °C. These silicon substrates, or wafers, are stiff, brittle, and unusable in a flexible application. The seemingly cheapest substrates for a flexible application are plastics whose maximum processing temperatures are ~150-200 °C. A major factor in the speed of electronic devices is the mobility of the electrons in the semiconducting material. Although single crystal silicon has the highest electron mobility of 650 cm2/V s, polycrystalline silicon thin-film transistors (TFT’s) have reasonably good electron mobility (as high as 500 cm2/V s)1-3 compared to amorphous silicon TFT’s, whose mobility is 2 orders of magnitude lower (1 cm2/V s)4. However, direct deposition of amorphous silicon onto polymer substrates can easily be done using various techniques5-7 at sub-150 °C temperatures whereas the typical method to produce polycrystalline films involves solid-phase crystallization8 requiring temperatures near 600 °C, and is difficult to process on a limited area. The method to be covered in this paper is a technique developed utilizing an excimer laser to locally crystallize the amorphous silicon that has been deposited on polymer substrates. Because of this novel technique, the polymer does not experience the thermal change that the silicon undergoes. By improving the electronmobilities, transistors can then be made in this silicon layer with reasonable operating speeds. Although not competitive with CMOS electronics in speed, these thin film transistors are essential in the flexible electronics market. 2. Electron mobility of strained silicon While the crystalline nature of silicon is very important in determining the electronic mobility in a thin film transistor, it turns out that mechanical strain is also a determining factor in the electron mobility. Although amorphous silicon has a significantly low electron mobility, it is still of interest in flexible electronics and research has gone into determining its resistance to mechanical strain9-11. In summary, the research revealed that tensile strain parallel to the film increased the electron mobility of n-type amorphous silicon whereas compressive strain decreased the electron mobility11. Figure 1: Normalized electron field-effect mobility plotted as a function of strain for different TFT's11.For single-crystal silicon films, the piezoresistance (change in the resistance vs. strain) is a result of the disruption of the cubic symmetry of the crystal12. Stretching in the direction of a crystal plane increases the energy of the conduction band valleys on that axis, transferring the electrons to the other two axis planes conduction valleys. Those transferred electrons now have higher mobility in the directions of the stretched plane. Hole mobility works in the inverse way: resulting in increased mobility in a state of compression. 3. Processing of silicon devices on flexible substrates 3.1. Amorphous silicon deposition Three methods have been successfully utilized to deposit amorphous silicon on a flexible substrate at low temperatures. These methods include plasma-enhanced chemical vapor deposition (PECVD), phase-vapor deposition (PVD), and low-pressure chemical vapor deposition (LPCVD). While PECVD films are uniform and void-free and extremely useful in an amorphous silicon device (particularly active matrix liquid crystal displays - AMLCD’s), their hydrogen content is typically very high. Pulsed laser crystallization of such a film would result in rapid release and bubbling of the hydrogen within the film and could even lead to film explosion13. However, if the hydrogen levels are limited, there still exists a potential to crystallize the films. PVD and LPCVD films have been found to be immediately useful for laser-crystalization14.3.2. Crystallization of silicon on a polymer substrate Various techniques have been developed to create high-mobility polycrystalline silicon on polymer substrates. Most commonly PVD or LPCVD amorphous silicon films are used as the layer to be laser-crystallized. The basic mechanism for laser crystallization is outlined in Figure 2 below as extracted from M.O. Thompson’s lecture15. The stacked films consist of the plastic substrate, a deposited layer (or two) of barrier SiO2, and a layer of amorphous silicon with thickness varying from 30 to 300 nm depending on the desired thickness. A pulsed excimer laser (wavelength of 308 nm) is focused onto a spot in the amorphous silicon layer for a duration of approximately 35 ns, turning the amorphous silicon into liquid silicon in the area of the focus. In order to do a full melt (bringing the silicon above its full melt threshold, or FMT), a 100 nm thick amorphous silicon film must be exposed to a fluence of 400 mJ/cm2 for the pulse duration. Once the pulse of laser light is over, the liquid silicon can solidify into polycrystalline silicon, the duration of which is about 150 ns in total.Figure 2: Example process flow of laser crystallization of amorphous silicon into polycrystalline silicon15. The plastic substrate is thermally protected from the silicon by the silicon dioxide barrier/passivation layer. The simulated temperature as a function of time of the various layers can be seen in Figure 316. Although the Si:SiO2 interface experiences roughly the same transient temperature as the silicon itself, it can be observed that the SiO2:polymer interface does not experience this peak temperature. The peak temperature experienced by the polymer is around 200 °C and since this is only for a few tens of microseconds, the polymer is not damaged.Figure 3: Transient temperature response of the various interfaces in the thin film stack. It is important to note that the polymer substrate (the blue trace) does not exceed 250 °C and only experiences this peak temperature for a few tens of microseconds16. Varying the parameters in the crystallization process can allow tailoring of the polycrystalline grain size. For example, bringing the amorphous silicon only up to a temperature below the full melt threshold will cause only a few