1EE290C - Spring 2004Advanced Topics in Circuit DesignHigh-Speed Electrical InterfacesLecture 11ComponentsPhase-Locked LoopsViterbi DecoderBorivoje NikolicMarch 2, 2004.2AnnouncementsHomework #2 due next weekProject will be posted this week23OutlinePLL and DLL componentsIntroduction to Viterbi decoderAdditional PLL material:ISSCC’04 tutorial by Dennis Fischettehttp://www.delroy.comReferences posted on the webChapter 12 in the textbook4Loop ComponentsPhase ComparatorProduces UP/DN pulses corresponding to phase differenceCharge PumpSources/sinks current for duration of UP/DN pulsesLoop FilterIntegrates current to produce control voltageVoltage-Controlled Delay Line Changes delay proportionally to voltageVoltage-Controlled OscillatorGenerates frequency proportional to control voltage35Timing Loop ComponentsPhase Comparatormeasures the time difference between two signal transitionsfor periodic signals measures the phase of one signal with respect to the otherthe sensor for most timing loopsDelay Linesadjust the delay between two points in a systemthe actuator for most timing loops except for PLLs that use VCOsLoop Filterssmooth response of the timing loopstabilize the loop (for PLLs)[Dally]6Phase ComparatorsφC∆φφ1φ20π/2π3π/2 2πOutput describes phase difference between two inputsmay be analog or digitalmay linearly cover a wide range, or just a narrow phase difference[Dally]47XOR Phase DetectorSensitive to duty cycle∆φVout(t)∆φVout90o180o∆φ8Flip-Flop Phase ComparatorFeed φ1into the clock inputFeed φ2into the data inputWith single-edge triggered FF, if Q is low, φ1is __________.Note that when ∆φ = 0, FF is put in a metastable stateIf same FF used for receiver and phase comparator, aperture offset is compensated for.Bang-bang loop controlDQQφ2φ10π/2π3π/2 2π[Dally]59Other Phase ComparatorsSequential phase-only comparatorasynchronous state machinepulses “up” or “down” output from transition on one input to transition on the otherSequential phase-frequency comparatorlike the sequential phase-only comparatorbut also keeps track of number of transitions on the two inputs and attempts to make them equaldon’t use this for a DLL!!![Dally]10Phase-Frequency DetectorSchematicD QD QABRstRstUPDNUP = 0DN = 1UP = 0DN = 0UP = 1DN = 0BB AAA BState-transition diagramABUPDNABUPDN611Dead-Zone in PFD“Dead-zone” occurs when the loop doesn’t respond to small phase errors - e.g. 10 ps phase error at PFD inputs:PFD cannot generate 10 ps wide Up and Down pulsesCharge-pump switches cannot turn on and off in 10 psSolution: delay reset to guarantee min. pulse width (typically > 150 ps)[Fischette]12Charge PumpConverts PFD digital UP/DN signals into chargeCharge is proportional to duration of UP/DNsignals Qcp= IUP*tUP– IDN*tDNThe LPF converts integrates currents Charge pump requirements:Match currents IUPand IDNReduce control voltage couplingSupply noise rejection, PVT insensitivity(Simple or bandgap biased)LPFUPDNIUPIDN713Charge Pump: Better SwitchesUnity-gain buffer controls the voltage over switchesCurrent mirrored into Iup/IdnTransmission gate switchesYoung, JSSC 12/9214Charge Pump: Reversed SwitchesIngino, JSSC 11/01Helpers815Loop FilterIntegrates charge-pump current onto C1cap to set average VCO frequency (“integral” path).Resistor provides instantaneous phase correction w/o affecting avg. freq. (“proportional” path).C2cap smoothes IR ripple on VctlTypical value Rlpfin kΩ16Loop Filter: Dual CPTransformation into PIDual charge pump architectureproportionalintegralManeatis, JSSC 12/96917Low-Pass Filter Smoothing Cap (C3)“Smoothing” capacitor on control voltage filters CP ripple, but may make loop unstable Creates parasitic pole: ϖp= 1/(R C2)C3< 1/10*C1for stabilityC3> 1/50*C1for low jitterSmoothing cap reduces “IR”-induced VCO jitter to < 0.5% from 5-10%∆fvco= KvcoIcpTerr/C3Larger C3/C1increases phase error slightly Fischette, ISSCC’0418Filter CapacitorsTraditionally thin gate capacitance has been usedBelow 130nm gate leakage is a problemC1 in the range of tens of pFAlternative: thick oxide or metal capArea penalty1019Variable Delay ElementsNeed:a delay elementa method to vary the delayDelay elementsinvertersource-coupled amplifierMethods to vary delaymultiplexing a tapped delay linevarying the power supply to an inverter chainvarying the capacitance driven by each stagevarying the resistive load of a source-coupled amplifierCharacterized bymax and min delaytypically a 2:1 throwstability (jitter)td[Dally]20Variable Delay ElementsSingle-ended vs. differentialIn CMOS inverter 1% of change in supply changes the delay by 1%(keep this in mind when using clock buffering)Current starved inverters and RC-loaded inverters are worse than 1%-for-1%.Improve by adding stabilization1121Example VCORing-oscillator-based VCO: RC loadedRing-oscillator-based VCO: Current-starvedJeong, JSSC’87Hudson, JSSC’8822Regulated Delay LineSidiropoulos’001223VCO: simple differential delayChange currentOr better: ResistancesNeed linear, variable resistors24Delay ElementsManeatis, JSSC’951325Replica Bias for the Delay ElementReplica biasing improves supply and substrate rejection26Replica Bias for the Delay Element0.2%delay/%supplyHorowitz, IEEE Micro’98Interpolation: Place an edge in between two existing edges1427Jared’s Trip to Berkeley28Viterbi AlgorithmExample of dynamic programming [Bellman’57]Invented by A. Viterbi in 1967Explained by Forney in 1972,1973Used for:Decoding convolutional codesDecoding trellis codesMaximum likelihood detectionSpeech recognition, etc.Types:Hard-input, hard-outputSoft-input, hard-outputSoft-input, soft-output1529TrellisStates + edgesNo loopsWeights in minutesMountain ViewPaloAltoMilpitasUnionCitySan MateoHaywardOaklandSan FranciscoBerkeley515101515 151520 202040204030Shortest Time to Get to Berkeley?What is the best path to take to:Union City?Hayward?Mountain ViewPaloAltoMilpitasUnionCitySan MateoHaywardOaklandSan FranciscoBerkeley515101515 151520 2020402040Choose the minimum cost at each point (state)1631Shortest Time to Get to Berkeley?What is the best path to take to:Union City?Mountain ViewPaloAlto(5)Milpitas(15)UnionCity(20)San MateoHaywardOaklandSan FranciscoBerkeley5151015202032Shortest Time to Get to Berkeley?What is the best path to take to:Hayward?Mountain ViewPaloAlto(5)MilpitasUnionCity(20)San MateoHayward(35)OaklandSan FranciscoBerkeley515151520 2020401733Shortest Time to Get to Berkeley?Mountain