DRM Class ProjectEE382V-SoCFall 2009Andreas GerstlauerMark McDermottThe University of Texas at AustinEE 382V Class NotesFoil # 2Project DescriptionThe class will be assigned to teams to do the various components of the design. The intent of the project is to do a HW/SW co-design of an embedded SOC. The design is a low power SOC implementation of the public domain DRM software implementation. We will use both a virtual platform (ARM) and a hardware platform (TLL5000-TLL6219) to simulate the design.These platforms consist of an ARM processor, I/O devices, memory components, hardware accelerators interconnected via a standard bus.The University of Texas at AustinEE 382V Class NotesFoil # 3Project Objectives and Activities The objectives of the project are as follows:1. Implement the DRM C++ code on a ARM based platform while meeting the performance, area and power metrics. The project activities include: Optimize the DRM C++ software for fixed point operation Profile the updated DRM C++ software implementation to determine performance bottlenecks Convert time critical functions to pseudo ANSI-C/SystemC code. Synthesize C code to Verilog for gate level implementation Partition the software into components which will run on the ARMprocessor and on the hardware accelerators Co-simulate and co-verify the HW/SW implementation Develop a high level power model of the systemThe University of Texas at AustinEE 382V Class NotesFoil # 4DRM PC Based System ArchitectureDRM code is designed to run on a desktop computerThe University of Texas at AustinEE 382V Class NotesFoil # 5DRM Software OverviewThe University of Texas at AustinEE 382V Class NotesFoil # 6DRM SW System ArchitectureThe University of Texas at AustinEE 382V Class NotesFoil # 7High Level HW ArchitectureFlashMemoryBuffer ConfigurableLogic(FPGA)ARM-9EmbeddedProcessor(iMX21)SDRAMMemorySDRAMMemoryEthernetRS232USB 1.1TLL5000TLL6219The University of Texas at AustinEE 382V Class NotesFoil # 8HW Development Tasks Develop the following FPGA modules: Memory Controller Interface to ARM Board and on chip bus Hardware Accelerators (using Catapult code) Clocking & Reset Interrupt logic DiagnosticsThe University of Texas at AustinEE 382V Class NotesFoil # 9Software based tasks Compile FLP DRM and get it running on ARM board Profile code on ARM board Convert FLP -> FXP in DRM code Run SNR checks Modify conversion as needed Compile FXP DRM and get it running on ARM board Profile code on ARM board Develop streaming I/O handler Develop interrupt handler Develop HAL TLL500 Prototyping BoardThe University of Texas at AustinEE 382V Class NotesFoil # 11TLL5000PrototypingPlatformThe University of Texas at AustinEE 382V Class NotesFoil # 12USB100Base-TPS-2 RS232AudioCodecVGAOutCompactFlash PortFlashMemoryMezzanine ConnectorsVideo DAC ARM-7 COPUSBJTAGPowerControlConfigurableLogic(FPGA)SDRAMMemoryAudioOutAudioInPowerConnectorEthernetPHYUSB2.0PHYDIP SwitchesVideoIn/OutNTSC/PALEncoder/Decoder7-SEG LED BankBuffersBuffersMezzanine ConnectorsTLL 5000 ArchitectureThe University of Texas at AustinEE 382V Class NotesFoil # 13Xilinx Spartan 3 FPGA Spartan 3 XC3S1500 Discussion Overview Logic Resources Memory Resources Clock Resources Input/Output ResourcesThe University of Texas at AustinEE 382V Class NotesFoil # 14Spartan 3 OverviewThe University of Texas at AustinEE 382V Class NotesFoil # 15Interconnect MatrixChannels contain various connection resourcesThe University of Texas at AustinEE 382V Class NotesFoil # 16Channel InterconnectsThe University of Texas at AustinEE 382V Class NotesFoil # 17CLBs & Slices• Each slice has 2 LUTs& 2 storage elementsThe University of Texas at AustinEE 382V Class NotesFoil # 18CLB Slice• 2 FFs or latches • 2 LUTs for combinational logic• Some LUTs can be used as distributed RAM or ROM, or shift registers• Carry look-ahead• Dedicated muxesThe University of Texas at AustinEE 382V Class NotesFoil # 19Multipliers• 2’s-complement multipliers distributed across fabric Primarily to support DSP Cascade connections Pipeline registers on inputs and outputs Can do 2 small width op• Can also be used for Barrel shifters Data storage• Some shared connections with adjacent block RAMThe University of Texas at AustinEE 382V Class NotesFoil # 20Block RAMThe University of Texas at AustinEE 382V Class NotesFoil # 21Clock NetworkThe University of Texas at AustinEE 382V Class NotesFoil # 22Digital Clock Manager (DCM) DCM functions Eliminate clock skew using Delay-Locked Loop (DLL) Monitors clock skew on output and corrects Performs frequency doubling Creates multiphase clocks Fractional Digital Frequency Synthesizer (DFS) fOUT = M/N fIN Clock conditioning Clock buffering and signal translationThe University of Texas at AustinEE 382V Class NotesFoil # 23Digital Clock Manager (DCM)The University of Texas at AustinEE 382V Class NotesFoil # 24Input/Output Block (IOB)• Slew rate and drive strength control• Pull-up, pull-down and keeper• DDR signals• Controlled-Z input/output• Boundary scanThe University of Texas at AustinEE 382V Class NotesFoil # 25I/O StandardsTLL6219 ARM Processor BoardThe University of Texas at AustinEE 382V Class NotesFoil # 27TLL6219 ARM Processor Board EthernetChipi.MX21FlashSDRAMSDRAMCPLDUser SwitchFlashResetRJ-45Ethernet ConnectorRJ-12SerialConnectorMiniUSBLCD connectorBoot ModeJumpersUser LEDsPower LED20 Pin CPU JTAG40 Pin GPIO connectorPowerSupplyThe University of Texas at AustinEE 382V Class NotesFoil # 28Mezzanine ConnectorsCPLDARM-9EmbeddedProcessor(iMX21)EthernetUSB 1.1DataBuffersSDRAMMemoryExpansion PortRS-232, GPIOFlash MemoryControlAddressBuffersJTAGHeaderControlJTAGDATA ADDRESSDATAADDRESSSW & LEDTLL6219 Block DiagramRS232The University of Texas at AustinEE 382V Class NotesFoil # 29i.MX21 Features The University of Texas at AustinEE 382V Class NotesFoil # 30BlockDiagramThe University of Texas at AustinEE 382V Class NotesFoil # 31iMX21 Memory MapThere are eight 512MB partitionsThe University of Texas at AustinEE 382V Class NotesFoil # 32iMX21 Memory MapDetailsThe University of Texas at AustinEE 382V Class NotesFoil # 33The University of Texas at AustinEE 382V Class NotesFoil # 34TLL6219 ARM926EJ-S Board External interfaces RS-232 serial port Ethernet USB-OTG (Linux host driver for flash disk) Graphic LCD panel TLL5000 Interface External
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