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Purdue ECE 27000 - Experiment 4

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ECE 270 Lab Verification / Evaluation Form Experiment 4 Evaluation: IMPORTANT! You must complete this experiment during your scheduled lab period. All work for this experiment must be demonstrated to and verified by your lab instructor before the end of your scheduled lab period. STEP DESCRIPTION MAX SCORE Pre-lab Data Sheet Values and Calculations 5 1 Circuit Construction and Function Verification 2 2 Measuring Static (DC) Characteristics Based on Rmin 4 3 Measuring Static (DC) Characteristics Based on Rmax 4 4 Circuit Modification for Timing Measurements 1 5 Measuring Dynamic Characteristics Based on Rmin 2 6 Measuring Dynamic Characteristics Based on Rmax 2 7 Thought Questions 5 TOTAL 25 Signature of Evaluator: ________________________________________________________ Academic Honesty Statement: IMPORTANT! Please carefully read and sign the Academic Honesty Statement, below. You will not receive credit for this lab experiment unless this statement is signed in the presence of your lab instructor. “In signing this statement, I hereby certify that the work on this experiment is my own and that I have not copied the work of any other student (past or present) while completing this experiment. I understand that if I fail to honor this agreement, I will receive a score of ZERO for this experiment and be subject to possible disciplinary action.” Printed Name: _____________________ Class No. __ __ __ __ - __ Signature: ____________________________________ Date: _______ECE 270 - Experiment 4 Purdue IM:PACT Little Bits Lab Manual -1- © 2013 by D. G. Meyer Investigation of Open-Drain Gate Characteristics Instructional Objectives: • To better understand open-drain gate static and dynamic behavior • To effectively choose the proper value of pull-up resistor for an open-drain circuit Prelab Preparation: • Read this document in its entirety • Review the material referenced in Module 1-J • Complete the pre-lab steps • Construct the circuit on your breadboard prior to your scheduled lab period Lecture/Demonstration: Your lab instructor will give a brief presentation that includes the following: • A review of voltage and current measurement techniques • A review of transition time and propagation delay measurement techniques Experiment Description: So-called “open-drain” gates − like the quad 2-input open-drain NAND chip (74HC03) included in your DK-2 kit − differ from “regular” gates in that they only contain N-channel (“pull down”) transistors. Recall that a normal CMOS gate uses a P-channel MOSFET as an “active pull-up” to source current in the high state. An open-drain gate, having no such P-channel device, has to rely on an external pull-up resistor (“passive pull-up”) in order to produce a logic high voltage. The “side-effects” of replacing an active pull-up with an external resistor are not immediately obvious, nor is the proper choice of pull-up resistor value. In this experiment you will investigate the characteristics of open-drain gates and practice utilizing information provided in a device data sheet. In particular, you will examine the tradeoffs between use of the “minimum” and “maximum” values of pull-up resistors allowable, as well as review how to calculate these values. You will see “first hand” how choice of pull-up resistor affects the static (DC) and dynamic (AC) performance of an open-drain circuit.ECE 270 - Experiment 4 Purdue IM:PACT Little Bits Lab Manual -2- © 2013 by D. G. Meyer Pre-lab Step (1): Reading the 74HC03 Data Sheet Access the 74HC03 and 74HC04 device data sheets posted under Reference Documents → IC Data Sheets on the course web site to answer the following questions. a) Calculate the “on” resistance (when the open-drain output is pulled low) based on the VOLmax specified @ IOLmax = 4 mA for the SN74HC03 when operated at Vcc = 4.5 V b) Note the off-state leakage current (IOH) for the SN74HC03 c) Note the maximum rise propagation delay (tPLH) for the SN74HC03 operated at Vcc = 4.5 V d) Note the maximum fall propagation delay (tPHL) for the SN74HC03 operated at Vcc = 4.5 V e) Note the maximum fall time (tf) for the SN74HC03 operated at Vcc = 4.5 V f) Note the IIH and IIL current required by the 74HC04 input Pre-lab Step (2): Calculation of Maximum Pull-up Resistor (Rmax) Based on a desired VIHmin = 4.77V @ IIH = 1 µA (for the 74HC04), calculate the maximum value pull-up resistor (Rmax) as outlined on page 33 of the Module 1 Lecture Summary notes (show work). Pre-lab Step (3): Calculation of Minimum Pull-up Resistor (Rmin) Based on the “worst-case” scenario outlined on page 33 of the Module 1 Lecture Summary notes and the values for the SN74HC03 determined in Pre-lab Step (1), calculate the minimum value of pull-up resistor (Rmin) as outlined on page 33 of the Module 1 Lecture Summary notes (show work).ECE 270 - Experiment 4 Purdue IM:PACT Little Bits Lab Manual -3- © 2013 by D. G. Meyer 12374HC03456910812131110K 10K 10K 10K5 VVoA B C D10K1KODODODOD1 274HC04Resistor LED5 V10KStep (1): Circuit Construction and Function Verification Construct the circuit illustrated below and set the potentiometer approximately mid-position. Complete the truth table by entering “H” for combinations that cause the LED to illuminate and “L” for those that do not. Determine the logic function realized. A B C D F(A,B,C,D) L L L L L L L H L L H L L L H H L H L L L H L H L H H L L H H H H L L L H L L H H L H L H L H H H H L L H H L H H H H L H H H H F(A,B,C,D) An open switch is “H” (logic 1 based on a positive logic convention), and a closed switch is “L” (logic 0 based on a positive logic convention). F(A,B,C,D) = ____________________________ECE 270 - Experiment 4 Purdue IM:PACT Little Bits Lab Manual -4- © 2013 by D. G. Meyer 12374HC03456910812131110K 10K 10K 10K5 VVoA B C D10K1KODODODOD1 274HC04Resistor LED5 V10KStep (2): Measuring Static (DC) Characteristics Based on Rmin Setting the potentiometer


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