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I/Os, DevicesAdministrationOverviewHardware or Software?DevicesPowerPoint PresentationDevice-Computer/Device-Device CommunicationDevice ControllerI/O ControllerI/O PortsMemory-Mapped I/O (1)Memory-Mapped I/O (2)3 Ways to Perform I/OPollingInterruptsHost-controller interface: InterruptsSupport for InterruptsInterrupt HandlerOther Types of InterruptsDirect Memory Access (DMA)DMA-CPU ProtocolDirect Memory Access (DMA)DMA IssuesDiscussionI/O Software LayersDevice DriversSlide 27Functions in Device DriversBufferingBuffering strategiesError ReportingSummaryCS 241 Spring 2007System Programming 01/14/19 CS241 © 2007 LA, RHC and YZ, All Rights Reserved1I/Os, DevicesCS 241 Lecture 24Lawrence AngraveS: Ch 11[482-500,513-516 ]2AdministrationMidterm pickup TA officeFriday regrading deadline3OverviewBasic I/O hardware ports, buses, devices and controllers I/O Software Interrupt Handlers, Device Driver, Device-Independent Software, User-Space I/O Software Important conceptsThree ways to perform I/O operationsPolling, interrupt and DMAs4Hardware or Software?Is the following component software or hardware?Device controllerIs the following component software or hardware?Device driver5DevicesDevicesStorage devices (disk, tapes)Transmission devices (network card, modem)Human interface devices (screen, keyboard, mouse)Specialized device (joystick)6•Why are keyboard and mouse are the slowest?•Why Gigabit Ethernet and graphics display are the fastest?7Device-Computer/Device-Device CommunicationPhysically: via signals over a cable or through air Logically: via a connection point - port (e.g., Serial port) Multiple devices are connected via a busA common set of wires and a rigidly defined protocol that specifies a set of messages that can be sent on the wires8Device ControllerI/O units typically consist of A mechanical component: device itselfAn electronic component----the device controller or adapter. Interface between controller and device is a very low level interface. Example: Disk's controller converts the serial bit stream, coming off the drive into a block of bytes, and performs error correction.9I/O ControllerDisk controller implements the disk side of the protocol that does: bad error mapping, prefetching, buffering, caching Controller has registers for data and control CPU and controllers communicate via I/O instructions and registers Memory-mapped I/O10I/O Ports 4 registers - status, control, data-in, data-outStatus - states whether the current command is completed, byte is available, device has an error, etc Control - host determines to start a command or change the mode of a device Data-in - host reads to get input Data-out - host writes to send output Size of registers - 1 to 4 bytes11Memory-Mapped I/O (1)(a) Separate I/O and memory space(b) Memory-mapped I/O(c) Hybrid12Memory-Mapped I/O (2)(a) A single-bus architecture(b) A dual-bus memory architecture133 Ways to Perform I/OPollingInterruptDMA14Polling Polling - use CPU to Busy wait and watch status bits Feed data into a controller register 1 byte at a timeEXPENSIVE for large transfers Not acceptable except small dedicated systems not running multiple processesReal life analogy?Check the status the cookie being baked in the ovenYour laundry machine15InterruptsConnections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires16Host-controller interface: Interrupts CPU hardware has the interrupt report line that the CPU senses after executing every instruction device raises an interrupt CPU catches the interrupt and saves the state (e.g., Instruction pointer) CPU dispatches the interrupt handler interrupt handler determines cause, services the device and clears the interrupt Why interrupts?Real life analogy for interruptAn alarm sets off when the food/laundry is readySo you can do other things in between17Support for InterruptsNeed the ability to defer interrupt handling during critical processing Need efficient way to dispatch the proper device Interrupt comes with an address (offset in interrupt vector) that selects a specific interrupt handling Need multilevel interrupts - interrupt priority level18Interrupt HandlerAt boot time, OS probes the hardware buses to determine what devices are present install corresponding interrupt handlers into the interrupt vector During I/O interrupt, controller signals that device is ready19Other Types of InterruptsInterrupt mechanisms are used to handle wide variety of exceptions: Division by zero, wrong address Virtual memory paging System calls (software interrupts/signals, trap) Multi-threaded systems20Direct Memory Access (DMA) Direct memory access (DMA) Assists in exchange of data between CPU and I/O controllerCPU can request data from I/O controller byte by byte – but this might be inefficient (e.g. for disk data transfer)Uses a special purpose processor, called a DMA controller Real life analogyHire a helper---housekeeper21DMA-CPU ProtocolUse disk DMA as an exampleCPU programs DMA controller, sets registers to specify source/destination addresses, byte count and control information (e.g., read/write) and goes on with other work DMA controller proceeds to operate the memory bus directly without help of main CPU – request from I/O controller to move/write data to memory addressDisk controller transfers data to main memoryDisk controller acknowledges transfer to DMA controller22Direct Memory Access (DMA)Operation of a DMA transfer23DMA IssuesHandshaking between DMA controller and the device controller Cycle stealing DMA controller takes away CPU cycles when it uses CPU memory bus, hence blocks the CPU from accessing the memory In general DMA controller improves the total system performance24DiscussionTradeoffs betweenProgrammed I/OInterrupt-driven I/OI/O using DMAWhich one is the fastest for a single I/O request?Which one gives the highest throughput?25I/O Software LayersLayers of the I/O Software System26Device DriversLogical position of device drivers is shown hereCommunications between drivers and device controllers goes over the bus27Device DriversDevice-specific code to control an IO device, is usually written by device's manufacturerEach controller has some device registers used to give it commands. The number of device registers and the nature of commands vary


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U of I CS 241 - I/Os, Devices

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