CMOS Analog IC Design Page 10.5-4 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 NYQUIST FREQUENCY ANALOG-DIGITAL CONVERTERS The sampled nature of the ADC places a practical limit on the bandwidth of the input signal. If the sampling frequency is fS, and fB is the bandwidth of the input signal, then fB < 0.5fS which is simply the Nyquist relationship which states that to avoid aliasing, the sampling frequency must be greater than twice the highest signal frequency.CMOS Analog IC Design Page 10.5-6 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 CLASSIFICATION OF ANALOG-DIGITAL CONVERTERS Analog-digital converters can be classified by the relationship of fB and 0.5fS and by their conversion rate. • Nyquist ADCs - ADCs that have fB as close to 0.5fS as possible. • Oversampling ADCs - ADCs that have fB much less than 0.5fS. Table 10.5-1 - Classification of Analog-to-Digital Converter Architectures Conversion Rate Nyquist ADCs Oversampled ADCs Slow Integrating (Serial) Very high resolution >14 bits Medium Successive Approximation 1-bit Pipeline Algorithmic Moderate resolution >10 bits Fast Flash Multiple-bit Pipeline Folding and interpolating Low resolution > 6 bitsCMOS Analog IC Design Page 10.5-7 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 STATIC CHARACTERIZATION OF ANALOG-TO-DIGITAL CONVERTERS DIGITAL OUTPUT CODES Table 10.5-2 - Digital Output Codes used for ADCs Decimal Binary Thermometer Gray Two’s Complement 0 000 0000000 000 000 1 001 0000001 001 111 2 010 0000011 011 110 3 011 0000111 010 101 4 100 0001111 110 100 5 101 0011111 111 011 6 110 0111111 101 010 7 111 1111111 100 001CMOS Analog IC Design Page 10.5-8 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 INPUT-OUTPUT CHARACTERISTICS Ideal input-output characteristics of a 3-bit ADCCMOS Analog IC Design Page 10.5-9 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 DEFINITIONS • The dynamic range, signal-to-noise ratio (SNR), and the effective number of bits (ENOB) of the ADC are the same as for the DAC • Resolution of the ADC is the smallest analog change that can be distinguished by an ADC. • Quantization Noise is the ±0.5LSB uncertainty between the infinite resolution characteristic and the actual characteristic. • Offset Error is the horizontal difference between the ideal finite resolution characteristic and actual finite resolution characteristic • Gain Error is the horizontal difference between the ideal finite resolution characteristic and actual finite resolution characteristic which is proportional to the analog input voltage.CMOS Analog IC Design Page 10.5-10 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 INTEGRAL AND DIFFERENTIAL NONLINEARITY The integral and differential nonlinearity of the ADC are referenced to the vertical (digital) axis of the transfer characteristic. • Integral Nonlinearity (INL) is the maximum difference between the actual finite resolution characteristic and the ideal finite resolution characteristic measured vertically (% or LSB) • Differential Nonlinearity (DNL) is a measure of the separation between adjacent levels measured at each vertical step (% or LSB). DNL = (Dcx - 1) LSBs where Dcx is the size of the actual vertical step in LSBs. Note that INL and DNL of an analog-digital converter will be in terms of integers in contrast to the INL and DNL of the digital-analog converter. As the resolution of the ADC increases, this restriction becomes insignificant.CMOS Analog IC Design Page 10.5-11 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 EXAMPLE OF INL and DNLCMOS Analog IC Design Page 10.5-12 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 MONOTONICITY A monotonic ADC has all vertical jumps positive. Note that monotonicity can only be detected by DNL. Example of a nonmonotonic ADC: If a vertical jump is 2LSB or greater, missing output codes may result. If a vertical jump is -1LSB or less, the ADC is not monotonic.CMOS Analog IC Design Page 10.5-13 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 EXAMPLE 10.5-2 INL and DNL of a 3-bit ADC Find the INL and DNL for the 3-bit ADC shown on the previous slide. Solution With respect to the digital axis: 1.) The largest value of INL for this 3-bit ADC occurs between 3/16 to 5/16 or 7/16 to 9/16 and is 1LSB. 2.) The smallest value of INL occurs between 11/16 to 12/16 and is -2LSB. 3.) The largest value of DNL occurs at 3/16 or 6/8 and is +1LSB. 4.) The smallest value of DNL occurs at 9/16 and is -2LSB which is where the converter becomes nonmonotonic.CMOS Analog IC Design Page 10.5-14 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 DYNAMIC CHARACTERISTICS The dynamic characteristics of ADCs are influenced by: • Comparators • Sample-hold circuits • Circuit parasitics • Logic propagation delayCMOS Analog IC Design Page 10.5-15 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 COMPARATOR The comparator is the quantizing unit of ADCs. Open-loop model: Nonideal aspects: • Input offset voltage, VOS (a static characteristic) • Propagation time delay - Bandwidth (linear) Av(s) = Av(0)sω c + 1 = Av(0)sτc + 1 - Slew rate (nonlinear) ∆T = C·∆VI (I is constant)CMOS Analog IC Design Page 10.5-16 Chapter 10 - DA and AD Converters (6/4/01) © P.E. Allen, 2001 LINEAR PROPAGATION TIME DELAY (Small input changes) If VOH and VOL are the maximum and minimum output voltages of the comparator, then minimum input to the comparator (resolution) is vin(min) = VOH - VOLAv(0) If the propagation time delay, tp, is the time required to go from VOH or from VOL to VOH+VOL2, then if vin(min) is applied to the comparator, the tP is, VOH - VOL2 = Av(0) [1- e-tp/τc] vin(min) = Av(0) [1- e-tp/τc] VOH - VOLAv(0) Therefore, tp is tp(max) = τc ln(2) = 0.693τc If vin is greater than vin(min), i.e. vin = kvin(min), then tp = τc ln2k2k -1 Illustration of these results:CMOS Analog IC Design Page 10.5-17 Chapter 10 - DA and