GTACResearch Review Morning Poster Session 150A Low Voltage, Dynamic BuckA Low Voltage, Dynamic Buck--Boost Boost Converter Supply for RF Power Converter Supply for RF Power AmplifierAmplifierAnalog Integrated Circuits LaboratorySchool of Electrical and Computer EngineeringGeorgia Institute of TechnologyGeorgia Tech Analog Consortium PresentationOctober 25, 2002Biranchinath SahuAdvisor: Prof. Gabriel A. Rincón-Mora22Georgia Tech Analog ConsortiumAbstractAbstract Efficiency of linear power amplifier (PA) can be enhanced by controlling the bias current and supply voltage dynamically For single cell NiMH/NiCd low voltage (0.9–1.8 V) applications, the supply voltage to the PA can be higher or lower than the battery voltage⇒ Dynamic Buck-Boost converter Buck-Boost converter presented in this work System: Supplies 0.4-2.5 V output voltage from 0.9-1.8 V battery input voltage on-the-fly Intuitive time average model of the power stage Compensation  Slow start and dynamically adaptive referenceGTACResearch Review Morning Poster Session 15133Georgia Tech Analog ConsortiumEfficient Linear Power Amplifier SystemEfficient Linear Power Amplifier System Only off-chip components: Converter filter components (L and C)Power Amplifier output match, RF chokeDirectional coupler DC-DC converter: Dynamically adaptive Supply: Low voltage battery  Technology: 0.25 µµµµm CMOSRFinputBattery(0.9 - 1.8V)RF OutputBuck-Boost DC-DC converterPeakdetectorPower AmplifierDirectionalCouplerAdjustable output(0.4 – 2.5V)44Georgia Tech Analog ConsortiumSynchronous BuckSynchronous Buck--Boost ConverterBoost ConverterVinIloadVoutL CRRESRPWMError amplifierVeaoDead-time control and drive circuitrySlow start and Vrefcontrol circuitryVph1Vph2DC condition: L = shortVph1-ave= Dvin= Vph2-ave= Vout(1-D)⇒⇒⇒⇒ Vout= Vin*D/(1-D)TonToffTVph2Vph1DD=0.5Vout= VinVoutPWMGTACResearch Review Morning Poster Session 15255Georgia Tech Analog ConsortiumPower Stage TimePower Stage Time--average Modelaverage ModelNet change:Vph1 →→→→ Vph1+ dVinVph2 →→→→ Vph2–dVout+ D/voutI →→→→ I + D/iin–dILwhere D/= 1 – DvoutCRRESRdVinD/voutD/iindVoutLdILiinTime-averaged small-signal modelVinIloadVoutL CRRESRVph1Vph2IWhen duty cycle increases from D to D+d the following changes occur:⇒⇒⇒⇒ Vph1 ↑↑↑↑ by dVin⇒⇒⇒⇒ Vph2 ↓↓↓↓ by dVout⇒⇒⇒⇒ IL↑↑↑↑ by iin1⇒ I ↓↓↓↓ by dIL,but ↑↑↑↑ by D/iin1⇒ Vout↓↓↓↓ initially, but ↑↑↑↑ by vout1⇒ Vph2↑↑↑↑ by D/vout1⇒ ILincrease changes iin1→→→→iin⇒ Voutincrease changes vout1 →→→→voutIL66Georgia Tech Analog ConsortiumPower Stage Transfer FunctionPower Stage Transfer Function2002z1zoddosQs1s1s1H)s(Hω+ω+ω−ω+=−DDVHoutod′=LDIVDOout22z′=ω,LCD0′=ωLCRDQ′=CR1ESR1z=ωFrequency (Hz)Frequency (Hz)Phase (degree)Gain (dB)Current source loadResistive loadCurrent source loadResistive loadWith Vout=2.5V, IO=0.6 A, D =0.7, L=2.2 µµµµH, C= 47 µµµµF, RESR= 70 mΩΩΩΩHod= 21.52 dB, f0= 4.695 kHzfz1= 48.37 kHz, fz2= 38.75 kHzFor current source load Q is higherControl-to-output transfer function is given by:Capacitor ESR zero =Complex double poles =RHP zero due to opposing feed forward action of inductor =GTACResearch Review Morning Poster Session 15377Georgia Tech Analog ConsortiumCompensation and StabilityCompensation and StabilityType-III Error AmplifierR4C2C1C3R5R3R1voutvinVref()[]()()[]()+++++++=3321222343214EACsR1CCsR1CsR1RRsC1)CC(sR1)s(AGain (dB)Phase (degree)Frequency (Hz)Frequency (Hz)Closed loopClosed loopOpen loopOpen loopPole at originDouble zero at LC complex polesPole at desired loop BW (less than RHP zero)Pole >> loop BW to ensure –20dB/dec slope88Georgia Tech Analog ConsortiumSlowSlow--start and Dynamic Control Signalstart and Dynamic Control Signal Slow start is required to: Reduce start-up transients Protect devices/components from stress⇒⇒⇒⇒ During start-up, the comparator output is high, the slowly charging capacitor voltage provides the control signal⇒⇒⇒⇒ When slow-start capacitor voltage reached a threshold, comparator output goes low, signal from peak detector takes over control⇒⇒⇒⇒ The noise filter prevents occurrence of high frequency transients in the control nodeVcontrolSignal from peak detectorBatteryNoise filterSlow-start chargingGTACResearch Review Morning Poster Session 15499Georgia Tech Analog ConsortiumSimulation ResultsSimulation ResultsSlow start PeriodSlow-start and worst case transient operationTransient responseSteady-state waveformsControl Voltage: 0.95 VSteady-state1010Georgia Tech Analog ConsortiumSummarySummary A dynamic, synchronous, non-inverting, voltage-mode buck-boost converter is presented Intuitive time-average small signal model of the power stage is derived without complex mathematical analysis A Type –III error amplifier compensation scheme is presented  A slow-start and dynamic control signal circuit is designed for reducing start-up and high frequency transients Simulation results for a dynamic control signal shows that the converter is capable to respond worst case power adjustment for CDMA IS-95 specification (1dB in 666 µµµµsec) Goal: Integrated dynamically adaptive DC-DC converter with Power