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CU-Boulder ECEN 5807 - Homework

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Buck voltage regulator with current-programmed mode (peak current-mode) control: design based on the more accurate model Figure 1 shows a closed-loop buck voltage regulator with current-programmed mode (CPM) controller. The CPM controller operates as shown in Figures 12.1 and 12.2 of the textbook. No compensation (“artificial”) ramp is employed. A simple compensator is designed around an op-amp to achieve wide-bandwidth closed-loop voltage regulation around the CPM controlled buck converter. In the design, the op-amp and the converter can be considered ideal. The circuit parameters and the feedback loop design specifications are as follows: • Vg = 12 V, Vref = 5 V, C = 100 µF, L = 4 µH, switching frequency fs = 100 kHz • Load current, I = V/R, is between Imin = 5 A and Imax = 20 A • Equivalent current-sensing resistance is Rf = 0.1 Ω. • It is required to design the compensator so that the crossover frequency fc is as high as possible, and so that the phase margin φm is at least 60o • To reduce the effects of switching ripples and noise on the closed-loop operation of the regulator, the compensator must include a high-frequency pole at fc2 = 25 kHz. +–L−VgvR+CVref = 5 VCPMcontrollerC2R2R1C1c(t)vc = Rf icRf isiLis Figure 1: CPM buck voltage regulator (a) Evaluation of the compensator design based on the simple CPM averaged-switch model: according to the simple model, a compensator with R1 = 10 kΩ, R2 = 9.1 kΩ, C1 = 700 pF, and C2 = 11 nF meets the specifications. Assuming a compensation (“artificial”) ramp with Ma = M2/2 is employed, use the more accurate model (the small-signal model resulting from the averaged model (4) discussed in the lectures) to find salient features (gains and corner frequencies) of the control-to-output transfer function Gvc(s) = v/ic. Plot (by hand) magnitude and phase Bode plots of the voltage loop gain T for the two extreme load current values, and determine (approximately) the crossover frequency fc and the phase margin φm in both cases.(b) Simulation. Verify your results for T, fc and φm in part (a) by PSpice simulations. Use the updated switch.lib library from the course web site: http://ece.colorado.edu/~pwrelect/book/PSPICE/index.html Use LM324 model for the op-amp. Note that Section B.2.2. describes an example of finding the loop gain by simulation, and Section B.3.2. describes an example of simulating a CPM controlled converter. Turn in plots of magnitude and phase responses, and compare the values found by simulation for fc and φm to the values found in part (a), for the two extreme values of the load current. (c) Compensator design based on the more accurate model. Design the CPM controlled converter, i.e. select Ma, and a compensator to meet the design specifications. Note that you may change the compensator configuration compared to the compensator shown in Figure 1. The solution is not unique. Verify your design by PSpice simulations. List the values of fc and φm obtained by simulation for the two extreme values of the load


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