William Stallings Computer Organization and Architecture 8th EditionAddressing ModesImmediate AddressingImmediate Addressing DiagramDirect AddressingDirect Addressing DiagramIndirect Addressing (1)Indirect Addressing (2)Indirect Addressing DiagramRegister Addressing (1)Register Addressing (2)Register Addressing DiagramRegister Indirect AddressingRegister Indirect Addressing DiagramDisplacement AddressingDisplacement Addressing DiagramRelative AddressingBase-Register AddressingIndexed AddressingCombinationsStack Addressingx86 Addressing Modesx86 Addressing Mode CalculationARM Addressing Modes Load/StoreARM Indexing MethodsARM Data Processing Instruction Addressing & Branch InstructionsARM Load/Store Multiple AddressingARM Load/Store Multiple Addressing DiagramInstruction FormatsInstruction LengthAllocation of BitsPDP-8 Instruction FormatPDP-10 Instruction FormatPDP-11 Instruction FormatVAX Instruction Examplesx86 Instruction FormatARM Instruction FormatsARM Immediate Constants Fig 11.11Thumb Instruction SetExpanding Thumb ADD Instruction to ARM Equivalent Fig 11.12AssemblerImprovementsProgram in: Binary HexadecimalSymbolic AddressesSymbolic ProgramAssembler ProgramForeground ReadingWilliam Stallings Computer Organization and Architecture8th EditionChapter 11Instruction Sets:Addressing Modes and FormatsAddressing Modes•Immediate•Direct•Indirect•Register•Register Indirect•Displacement (Indexed) •StackImmediate Addressing•Operand is part of instruction•Operand = address field•e.g. ADD 5—Add 5 to contents of accumulator—5 is operand•No memory reference to fetch data•Fast•Limited rangeImmediate Addressing DiagramOperandOpcodeInstructionDirect Addressing•Address field contains address of operand•Effective address (EA) = address field (A)•e.g. ADD A—Add contents of cell A to accumulator—Look in memory at address A for operand•Single memory reference to access data•No additional calculations to work out effective address•Limited address spaceDirect Addressing DiagramAddress AOpcodeInstructionMemoryOperandIndirect Addressing (1)•Memory cell pointed to by address field contains the address of (pointer to) the operand•EA = (A)—Look in A, find address (A) and look there for operand•e.g. ADD (A)—Add contents of cell pointed to by contents of A to accumulatorIndirect Addressing (2)•Large address space •2n where n = word length•May be nested, multilevel, cascaded—e.g. EA = (((A)))–Draw the diagram yourself•Multiple memory accesses to find operand•Hence slowerIndirect Addressing DiagramAddress AOpcodeInstructionMemoryOperandPointer to operandRegister Addressing (1)•Operand is held in register named in address filed•EA = R•Limited number of registers•Very small address field needed —Shorter instructions—Faster instruction fetchRegister Addressing (2)•No memory access•Very fast execution•Very limited address space•Multiple registers helps performance—Requires good assembly programming or compiler writing—N.B. C programming –register int a;•c.f. Direct addressingRegister Addressing DiagramRegister Address ROpcodeInstructionRegistersOperandRegister Indirect Addressing•C.f. indirect addressing•EA = (R)•Operand is in memory cell pointed to by contents of register R•Large address space (2n)•One fewer memory access than indirect addressingRegister Indirect Addressing DiagramRegister Address ROpcodeInstructionMemoryOperandPointer to OperandRegistersDisplacement Addressing•EA = A + (R)•Address field hold two values—A = base value—R = register that holds displacement—or vice versaDisplacement Addressing DiagramRegister ROpcodeInstructionMemoryOperandPointer to OperandRegistersAddress A+Relative Addressing•A version of displacement addressing•R = Program counter, PC•EA = A + (PC)•i.e. get operand from A cells from current location pointed to by PC•c.f locality of reference & cache usageBase-Register Addressing•A holds displacement•R holds pointer to base address•R may be explicit or implicit•e.g. segment registers in 80x86Indexed Addressing•A = base•R = displacement•EA = A + R•Good for accessing arrays—EA = A + R—R++Combinations•Postindex•EA = (A) + (R)•Preindex•EA = (A+(R))•(Draw the diagrams)Stack Addressing•Operand is (implicitly) on top of stack•e.g. —ADD Pop top two items from stackand addx86 Addressing Modes•Virtual or effective address is offset into segment—Starting address plus offset gives linear address—This goes through page translation if paging enabled•12 addressing modes available—Immediate—Register operand—Displacement—Base—Base with displacement—Scaled index with displacement—Base with index and displacement—Base scaled index with displacement—Relativex86 Addressing Mode CalculationARM Addressing ModesLoad/Store•Only instructions that reference memory•Indirectly through base register plus offset•Offset—Offset added to or subtracted from base register contents to form the memory address•Preindex—Memory address is formed as for offset addressing—Memory address also written back to base register—So base register value incremented or decremented by offset value•Postindex—Memory address is base register value—Offset added or subtractedResult written back to base register•Base register acts as index register for preindex and postindex addressing•Offset either immediate value in instruction or another register•If register scaled register addressing available—Offset register value scaled by shift operator—Instruction specifies shift sizeARM Indexing MethodsARM Data Processing Instruction Addressing& Branch Instructions•Data Processing —Register addressing–Value in register operands may be scaled using a shift operator—Or mixture of register and immediate addressing•Branch—Immediate—Instruction contains 24 bit value—Shifted 2 bits left –On word boundary–Effective range +/-32MB from PC.ARM Load/Store Multiple Addressing•Load/store subset of general-purpose registers •16-bit instruction field specifies list of registers•Sequential range of memory addresses•Increment after, increment before, decrement after, and decrement before•Base register specifies main memory address •Incrementing or decrementing starts before or after first memory accessARM Load/Store Multiple Addressing DiagramInstruction Formats•Layout of bits in an instruction•Includes