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ECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutTopicsTopics––Verification and TestVerification and TestParts of this lecture were adapted from Bushnell and Agrawal testing class notes, Rutgers UniversityECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutDefinitionsDefinitions••Design synthesis: Given an I/O function, develop aDesign synthesis: Given an I/O function, develop aprocedure to manufacture a device using knownprocedure to manufacture a device using knownmaterials and processes.materials and processes.••Verification: Predictive analysis to ensure that theVerification: Predictive analysis to ensure that thesynthesized design, when manufactured, will performsynthesized design, when manufactured, will performthe given I/O function.the given I/O function.••Test: A manufacturing step that ensures that theTest: A manufacturing step that ensures that thephysical device, manufactured from the synthesizedphysical device, manufactured from the synthesizeddesign, has no manufacturing defect.design, has no manufacturing defect.ECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutVerification and TestingVerification and Testing••2 types of errors that we need to test for2 types of errors that we need to test for––Design Design defects (verification)defects (verification)••Logic DesignLogic Design••SchematicSchematic••LayoutLayout––Manufacturing Manufacturing defects (testing)defects (testing)••Permanent faultsPermanent faults••Transient faultsTransient faults••Aging faultsAging faultsECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutVerification vs. TestVerification vs. Test••Verifies correctness ofVerifies correctness ofdesign.design.••Performed byPerformed bysimulation, hardwaresimulation, hardwareemulation, or formalemulation, or formalmethods.methods.••Performed once prior toPerformed once prior tomanufacturing.manufacturing.••Responsible for qualityResponsible for qualityof design.of design.••Verifies correctness of manufacturedVerifies correctness of manufacturedhardware.hardware.••Two-part process:Two-part process:––1. Test generation: software1. Test generation: softwareprocess executed once duringprocess executed once duringdesigndesign––2. Test application: electrical tests2. Test application: electrical testsapplied to hardwareapplied to hardware••Test application performed on everyTest application performed on everymanufactured device.manufactured device.••Responsible for quality of devices.Responsible for quality of devices.ECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutDesign DefectsDesign Defects••Testing using simulationTesting using simulation––Verification of designVerification of design––Usually design to schematic/layout transition isUsually design to schematic/layout transition isdefect-free if using automated toolsdefect-free if using automated tools••Testing using functional verificationTesting using functional verification––Much more difficult problem, but potentially fasterMuch more difficult problem, but potentially faster••Performance simulationPerformance simulation••Full system simulation - e.g. boot up an OS on aFull system simulation - e.g. boot up an OS on aprocessor in the simulatorprocessor in the simulator••““If you donIf you don’’t test it, it t test it, it doesndoesn’’tt work work””ECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defects••Physical DefectsPhysical Defects––Silicon substrate defectsSilicon substrate defects––Mask contaminationMask contamination––Photolithographic errorsPhotolithographic errors––Oxide abnormalitiesOxide abnormalitiesECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defects••Electrical FaultsElectrical Faults––ShortsShorts––OpensOpens––Transistor stuck-onTransistor stuck-on––Excess resistanceExcess resistance––Excess currentExcess currentECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defects••Logical FaultsLogical Faults––Stuck-at-0Stuck-at-0––Stuck-at-1Stuck-at-1––Delay faultDelay fault––Bridging faultBridging faultECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defectsA+BABABA+Bs-a-0ECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defects••Wafer-level probe testingWafer-level probe testing––Most manufacturing defects are caught atMost manufacturing defects are caught atthis pointthis point••Package level testingPackage level testing––Pin-Pad bond faultsPin-Pad bond faults––Damage due to handlingDamage due to handling––Performance related errorsPerformance related errorsECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutManufacturing defectsManufacturing defects••Board-level probe testingBoard-level probe testing––Package damagePackage damage––Infant mortalityInfant mortality––Burn-in testingBurn-in testing••User testingUser testing––Transient faultsTransient faults––Defects that appear due to agingDefects that appear due to aging••Metal migrationMetal migration••Device BreakdownDevice Breakdown––Environmental errorsEnvironmental errorsECE 249 VLSI Design and SimulationSpring 2005Lecture 21© John A. ChandyDept. of Electrical and Computer EngineeringUniversity of ConnecticutSub-types of


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