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On the Use of Bloom Filters for Defect Maps in Nanocomputing Gang Wang Wenrui Gong Ryan Kastner Department of Electrical and Computer Engineering University of California Santa Barbara CA 93106 9560 wanggang gong kastner ece ucsb edu ABSTRACT While the exact manufacturing process for nanoscale computing devices is uncertain it is abundantly clear that future technology nodes will see an increase in defect rates Therefore it is of paramount importance to construct new architectures and design methodologies that can tolerate large numbers of defects Defect maps are a necessity in the future design flows and research on their practical construction is essential In this work we study the use of Bloom filters as a data structure for defect maps We show that Bloom filters provide the right tradeoff between accuracy and space efficiency In particular they can help simplify the nanosystem design flow by embedding defect information within the nanosystem delivered by the manufacturers We develop a novel nanoscale memory design that uses this concept It does not rely on a voting strategy and utilizes the device redundancy more effectively than existing approaches Categories and Subject Descriptors J 6 Computer Aided Engineering Computer Aided Design CAD General Terms Algorithms Design Theory Keywords Nanotechnology Defect tolerant Bloom filter Defect map 1 INTRODUCTION In research laboratories around the world prototype nanoscale devices have been constructed using bottom up chemical assembly instead of top down lithography that has dominated VLSI manufacturing in the past decades This progress brings the hope that in the not too distant future we will be able to create computing devices with unprecedented density 1010 devices cm2 that operate in the THz frequency domain 3 There are fundamental differences between traditional fabrication methods and the proposed nanoscale methods Nanoscale manufacturing techniques cannot replicate the complex structures seen in today s ASIC

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