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Data Transfer Instructions

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80486 DATA TRANSFER INSTRUCTIONSOPCODE1BY WD +FollowingByte(s) FLAGSOSZAPCMNE-MONICOPERANDSDESCRIPTION / COMMENTS( | means "or")88 89 EA0 A1 E-- 8C EC6 C7 -B0 B8 RDOP Address SOP+S SOP+00 ii ------MOV op,reg AL|AX|EAX,addressop,seg op,immediate reg,immediate op ← reg AL|AX|EAX ← M(address) Address is 2 bytes op ← seg (seg = CS, DS, ES, SS, FS, GS) op ← immediate reg ← immediate -- 50 R-- FF --- 06 S¶ 0F A0¶ 0F A86A 68 - SOP+30 i ------PUSH reg op seg FS GS immediate TOS ← reg TOS ← op TOS ← seg (seg = CS, DS, ES, SS) TOS ← FS TOS ← GS TOS ← immediate-- 58 R-- 8F --- 07 S¶ 0F A1¶ 0F A9 SOP+00 ------POP reg opsegFS GS reg ← TOS op ← TOS seg ← TOS (seg = DS, ES, SS) FS ← TOS GS ← TOS -- 8D -DOP------LEA reg,mem opreg ← effective addressLoad Effective Address-- C5 -DOP------LDS reg,mem opreg,DS ← 4 or 6 bytes from memory-- C4 -DOP------LES reg,mem opreg,ES ← 4 or 6 bytes from memory9C------PUSHF @PUSHFD BTOS ← FLAGS.15 to .0 Push FlagsTOS ← EFLAGS (except VM and RF) 9DRRRRRRPOPF @POPFD BFLAGS.15 to .0 ← TOS Pop FlagsEFLAGS (except VM and RF) ← TOS -- C8 -iw ib------ENTER iw, ibib mod32; TOS ← gBP; et al.-- C9 -------LEAVEgSP ← gBP, gBP ← TOS-- 62 -DOP------BOUND rg,mg&gInt #5 and EIP ← address of this BOUND instructionif rg < 1st limit or rg > 2nd limit + opnd size86 87 --- 90 RDOP------XCHG op,reg AX,reg exchange values of op and reg exchange values of AX and reg D7 -- -------XLAT table (optional)AL ← M(BX+zeoAL)Table LookupEC ED -E4 E5 - ib ------IN AL|AX,DX AL|AX|EAX,Port# AL|AX|EAX ← input port #DX AL|AX|EAX ← input port # Port # is 1 byte EE EF -E6 E7 - ib ------OUT DX,AL|AX|EAX Port#,AL|AX|EAX output port #DX ← AL|AX|EAX output port # ← AL|AX|EAX Port # is 1 byte 9F -- -------LAHFAH ← flags.7 to .0 Load AH from Flags9E -- --RRRRRSAHFflags.7 to .0 ← AH Store AH into Flags60------PUSHA @PUSHAD BTOS ← AX,CX,DX,BX,orig SP, BP,SI,DIPush AllTOS ← EAX,ECX,EDX,EBX,orig ESP, EBP,ESI,EDI61------POPA @POPAD BDI,SI,BP,xxx,BX,DX,CX,AX ← TOSPop AllEDI,ESI,EBP,xxx,EBX,EDX,ECX,EAX ← TOS¶ 0F B2DOP------LSS reg,mem opreg,SS ← 4 or 6 bytes from memory¶ 0F B4DOP------LFS reg,mem opreg,FS ← 4 or 6 bytes from memoryR J Borrmann - Manhattan College For Explanation of Symbols Used, see Page 2. 486LIST PAGE 1OPCODE1BY WD +FollowingByte(s) FLAGSOSZAPCMNE-MONICOPERANDSDESCRIPTION / COMMENTS( | means "or")¶ 0F B5DOP------LGS reg,mem opreg,GS ← 4 or 6 bytes from memory¶ 0F 20 to 26DOP??????MOV r32,control regs control regs,r32 move to or from the processor's control registers, testregisters, and debug registers¶ 0F B6¶ 0F B7DOP DOP ------MOVZX rg, ob rd, ow rg ← zeo(ob)Move with Zero Extendrd ← zeo(ow)¶ 0F BE¶ 0F BFDOP DOP ------MOVSX rg, ob rd, ow rg ← seo(ob)Move with Sign Extendrd ← seo(ow)¶ 0F C8+r------BSWAP rd Toggles Big/Little Endian format in 32-bit reg only. (Result is undefined for 16-bit operand)Byte Swap¶ 0F A6¶ 0F A7DOP DOP OSZAPCCMPXCHG ob,rb og,rg If AL|AX|EAX = dest, then dest ← source register,otherwise AL|AX|EAX ← destCompare/Exchange-- 63 -DOP--*---ARPL ow,rwAdjust RPL field of selector¶ 0F 9xSOP+00------SETcc obob ← 00 or 01Set Byte if Condition TrueExplanation of Symbols UsedOPCODE: For byte operands, the hex opcode is shown under "BY". For word (16-bit) or doubleword (32-bit) operands, the hexopcode is shown under "WD". When a code appears under "+", it means that a possible adder exists to the base opcode value:E means add 02 hex to reverse the roles of the two operands (e.g., to change op,reg to reg,op )R means add 00 to 07 to specify the registerN means use opcode 83 for a word or doubleword operand with sign-extended 8-bit immediate data.V means add 00 if the operands are op,1 but add 02 if the operands are op,CL .S means add 00 to 03 to specify segment register ES, CS, SS, DS respectively.¶ denotes that the opcode is 2 bytes long. Ignore the "BY", "WD", and "+" columns for these instructions. "x" denotes the hex digitcorresponding to the condition code (cc):ccO NO C, B,NAENC, NB,AEZ,ENZNEBE,NGA,NBES NS P, PEPO,NPL,NGENL,GELE,NGG,NLEx01 2 3 456789ABCDEFFollowing Byte(s): DOP means double-operand addressing; SOP+nn means single-operand addressing, with hex nmber nn addedto the base SOP code. i means immediate value, the same size as the other operand. ib means immediate byte. iw means immediateword.FLAGS: Shows which flags can be affected by execution of the instruction. Letters OSZAPC stand for standard effects onprocessor flags OF (overflow), SF (sign), ZF (zero), AF (auxiliary carry), PF (parity), and CF (carry), respectively. - means the flagis not affected. ? means the flag value is undefined. * denotes a special algorithm for this flag for this instruction.OPERANDS: b = 8-bit (byte), w = 16-bit (word), d = 32-bit (doubleword), r = register, m = memory operand, o or op = r or m, i = immediate value, g = w or d (depending on operand size 16 or 32 bits). Immediate operands and displacements aresign-extended (seo) if necessary before being added to other values.DESCRIPTION / COMMENTS: seo = sign-extension of. zeo = zero-extension of. g before a register or operand denotes a wordor doubleword size (depending on the operand size 16 or 32 bits). For example, gAX means AX or EAX . a before a register oroperand denotes a word or doubleword size (depending on the addressing size 16 or 32 bits). TOS = top of stack. TOS ← meanspush onto stack. ← TOS means pop from stack.R J Borrmann - Manhattan College For Explanation of Symbols Used, see Page 2. 486LIST PAGE 280486 ARITHMETIC INSTRUCTIONSOPCODE1BY WD +FollowingByte(s) FLAGSOSZAPCMNE-MONICOPERANDSDESCRIPTION / COMMENTS( | means "or")¶ 0F C0¶ 0F C1DOPDOPOSZAPCXADD ob, rbog, rgsource ← dest, dest ← dest + original source00 01 E80 81 N04 05 -DOP SOP+00 ii OSZAPCADD op,reg op,immediate AL|AX|EAX,immedop ← op + regAdd10 11 E80 81 N14 15 -DOP SOP+10 ii OSZAPCADC op,reg op,immediate AL|AX|EAX,immedop ← op + reg + CFAdd with Carry-- 40 RFE FF - SOP+00 OSZAP-INC reg op reg ← reg + 1 Incrementop ← op + 137 -- -???A?CAAAAL ← f(AL,flags) ASCII Adjust27 -- -?SZAPCDAAAL ← f(AL,flags) BCD Adjust28 29 E80 81 N2C 2D -DOP SOP+28 i i OSZAPCSUB op,reg op,immediate AL|AX|EAX,immedop ← op - regSubtract18 19


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