RFIC Design I, EE220 Fall 2011 page 1 San José State University Department of Electrical Engineering EE220, Radio Frequency Integrated Circuit Design I Number 43744, Section 01, Fall 2011 Instructor: Prof. Hamedi-Hagh Office Location: ENGR381 Phone: (408) 924-4041 Email: [email protected] Office Hours: Tuesdays 13:30 to 16:00 and Wednesdays 10:15 to 12:00 or by appointment Class Schedule: Tuesdays/Thursdays 16:30-17:45 Classroom: ENGR401 Prerequisites: EE124 or instructor consent Course Description: The radio frequency integrated circuit design 1 (RFIC I) is an introductory graduate level course which covers topics of wireless transceiver architectures, RF modeling of transistors and integrated components including planar inductors, capacitors and transformers in submicron CMOS and Bipolar processes, network theory, S-parameters, power gains of 2-port networks, lumped transmission lines, wideband impedance matching and concepts such as intercept points, intermodulation distortion and link budgets of transmitter distortion as well as phase noise, noise figure and link budgets of receiver noise. Required Textbook: The RFIC notes, authored by Prof. Hamedi-Hagh, are available from the IEEE office (ENGR 370). Students must respect the copyright law and they should not copy or duplicated notes. Suggested Reference Materials for Extra Readings: •B. Razavi, RF Microelectronics, Upper Saddle River, New Jersey, Prentice Hall, 1998 •T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge, U.K., Cam-bridge University Press, 2004 •D.M. Pozar, Microwave Engineering, New York, John Wiley, 1998 Grading: assignments 20% midterm exam 20% project 30% final exam 30% Grading Percentage Breakdown: 90% and above A 89% - 85% A- 84% - 82% B+RFIC Design I, EE220 Fall 2011 page 2 81% - 79% B 78% - 75% B- 74% - 72% C+ 71% - 69% C 68% - 65% C- 64% - 62% D+ 61% - 59% D 58% - 55% D- below 55% F Exams: Exams will be based on the lecture notes and class discussions. Exam schedules are listed on the course syllabus. The midterm exam will be 75 minutes with 3 questions and the final exam will be 135 minutes with 5 questions. Exams will be open note. Students will not be admitted to the class 10 minutes after the start of each exam. There will be no make-up exam and those absent will receive no credit. Assignments: Class assignments will involve problem sets, EM analysis, system level and circuit simulations using Cadence. Cadence will not be taught in this course and students are required to master this CAD tool by themselves. More information will be available under the EE220 course menu in http://www.ics.sjsu.edu Project: More details on projects, related to the topics discussed in this course, will be provided as the lectures progress. Projects, assigned to different student groups, require a formal report typed using a word processor (i.e. Microsoft Office) with all original graphs included. Students must submit the printed version of their reports along with all supporting data and writeup in a readable CD by the last Friday noon of the semester before the exams start. Academic Integrity Statement: Your own commitment to learning, as evidenced by your enrollment at San Jose State University, and the University’s Academic Integrity Policy requires you to be honest in all your academic course work. Faculty members are required to report all infraction to the Office of Student Conduct and Ethical Development. The policy on academic integrity can be found at http://sa.sjsu.edu/student_conduct Students in this course are expected to maintain high ethical standards in all matters pertaining to the course, including, but not limited to, examinations, homework, course assignments, presentations, writing, laboratory work, team work, treatment of class members, and behavior in class. Cheating and plagiarism are violations of the SJSU Policy on Academic Dishonesty (S98-1) and will not be tolerated in the class. Students are expected to have read the Policy, which is available at http://www2.sjsu.edu/senate/S014-12.pdf Campus Policy in Compliance with the Americans with Disabilities Act: If you need course adaptations or accommodations because of a disability, if you have emergency medical information to share or if you need to make special arrangements in caseRFIC Design I, EE220 Fall 2011 page 3 the building must be evacuated, please make an appointment with your course instructor or see him/her during office hours as soon as possible. Graduate Program Outcomes (GPO): 1. Students will be able to base analysis, problem solving and design on core advanced EE theory. 2. Students will be able to develop deeper understanding of an area of concentration in their graduate programs. 3. Students will be able to apply modern tools for computations, simulations, analysis, and design. 4. Students will be able to communicate engineering results effectively. Course Learning Objectives (CLO): •The ability to understand the operation of the communication links •The ability to understand the differences among wireless communication standards •The ability to understand the differences among wireless communication standards •The ability to understand the effect of the frequency on circuit components •The ability to distinguish between RF and analog circuit design •The ability to analyze feedback structures caused by circuit parasitics or architecture •The ability to learn to analyze two-port networks and systems •The ability to learn methods and microwave tools to analyze RF circuits •The ability to understand the power transmission theory •The ability to design all kinds of matching networks suitable for integrated circuits •The ability to learn the substrate and metallization layers of CMOS processes •The ability to analyze and design planar inductors and transformers •The ability to calculate the value of the circuit components at radio frequencies •The ability to analyze nonlinear RF circuits •The ability to determine the effect of cascading on nonlinearity •The ability to understand the noise physics and how it is generated •The ability to determine the impact of the noise on system sensitivity •The ability to perform the system level analysis and design wireless transmitters and receiverRFIC Design I, EE220 Fall 2011