Cadence Tutorial D: Design Variables and Parametric Analysis 1 Cadence Tutorial D: Using Design Variables and Parametric Analysis Created for the MSU VLSI program by Casey Wallace Last Updated: 08/26/2008 by Waqar Ahmed Qureshi Document Contents Introduction Using Design Variables Running a Parametric Analysis Passing (Localized) Parameters Notes about Design Variables and Parametric Analysis Introduction Design variables provide a method for specifying circuit parameters just before a simulation. This allows you to make quick changes to parameter values across single or multiple circuit components without having to edit any schematics schematic. Design variables can also be used to enable parametric analysis, which can sweep a design variable across a range of values and displays multiple simulation results on a single plot. Using Design Variables This part of the tutorial will show you how to parameterize the width of the NMOS and PMOS transistors of an inverter by using design variables. These variable values are then set using the Analog Design Environment prior to simulation. 1. Make a copy of the inverter cell schematic you have previously designed, or create a new one. 2. Open the schematic of the inverter. 3. Left click on the NMOS transistor to select it, and view its properties by center clicking on it and selecting Properties. (or you can press ‘q’ as a shortcut). 4. Delete the text in the width box, and type nw. This specifies that a variable called nw will be used to set the width of the NMOS. When you do this, observe that values for “Drain/Source Diffusion Area” change from a constant value to a formula that involves the variable nw. Always check to make sure that formula is updated when you change the width to a variable; otherwise, your simulation results will be incorrect. Click OK to apply the change. 5. Repeat this procedure to change the width of the PMOS to pw. 6. Select Design → Check and save. Verify that there are no errors. 7. Launch the Virtuoso Analog Design Environment.(ADE L) 8. Set up the simulation environment as you normally would for simulating a schematic. This includes specifying a stimulus file and transient run length, enabling the SPICE netlist reader in the environment options, and selecting the outputs to be plotted on the schematic. 9. In ADE L, select Variables → Copy from cell view. The design variables nw and pw should appear in the Design Variables area of the Analog Environment Window. 10. In ADE L, select Variables → Edit. Left-click on nw. In the value box, type 1.5u and then apply the value by clicking Apply. Change the value of pw to 3.0u and click Apply. Once the values have been assigned, click OK. See Figures 1 and 2 below. 11. In ADE L, run the simulation by selecting Simulation → Netlist and Run. After waiting for the simulation to complete, the results window will pop up. The results should beCadence Tutorial D: Design Variables and Parametric Analysis 2 identical to those you would see if you sized the PMOS and NMOS widths to 3.0um and 1.5um, respectively. 12. In ADE L, select Variables → Edit. Left-click on pw. In the value box, type 1.5u and then apply and run the simulation by clicking Apply & Run Simulation. A new waveform results window will pop up after a short time. Changing design variables in this way provides a quick way to run different simulations without needing to edit and save the schematic in between. Figure 1: The Editing Design Variables dialog window. Figure 2: Analog Design Environment after initialization. Running a Parametric Analysis This part of the tutorial will show you how to set up a simple parametric sweep analysis in Cadence. In this example, the width of the PMOS transistor is swept from 1.5um to 3.0um in 11 linear steps, and each waveform is plotted in the same results window. This allows you to observe the effect of increasing the transistor size ratio on the delays of the inverter circuit through a single simulation.Cadence Tutorial D: Design Variables and Parametric Analysis 3 1. Perform any steps 1-8 from the previous section needed to parameterize your inverter size by values nw and pw and to set up the Analog Design Environment for simulation. 2. In ADE L, select Variables → Copy from cell view. The design variables nw and pw should appear in the Design Variables area of the Analog Environment Window. 3. In ADE L, select Variables → Edit. Left-click on nw. In the value box, type 1.5u and then apply the value by clicking Apply. Leave the value of pw blank. Once the values have been assigned, click OK. 4. In ADE L, select Tools → Parametric Analysis. This should bring up the parametric analysis window. 5. In the box named Variable Name, enter pw. In the From box, enter 1.5u. In the To box, enter 3.0u. In the Total Steps box, enter 11. Verify that the Step Control selection box is set to “Auto”. 6. Verify that the Parametric Analysis window appears as it does in Figure 3. Once you are certain, begin simulation by selecting Analysis → Start. 7. After waiting for the simulation to complete, the results window will pop up. If you have selected the input and output to be plotted, there will be 22 output waveform present - 11 identical inverter input waveforms, and 11 different output waveforms. 8. Depending on the number of simulations being displayed you may need to maximize the results window to see all of the legend text. You can also turn each waveform display on or off. Select Curves → Options. A Curves window should pop up. Select the name of the curve by clicking on it and press On or Off and then OK. There are many other useful options in this window for changing the display of results. Figure 3: Parametric Analysis dialog window. Passing (Localized) Parameters Design variables as applied above are useful for setting parameters that are defined globally – such as the value of the minimum transistor width, or VDD. However, it is often necessary to have localized parameters that apply only to an instanced cell, and not to all cells in a design. For example, you may want to create a single inverter schematic with parameterized transistor sizes, but you want every instance of the inverter to have a custom size. This part of the tutorial describes how to use the pPar() function in order to pass parameter values from a parent cell to its constituent components.Cadence Tutorial D: Design Variables and Parametric
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